I change the memory node:
memory {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x40000000>; /* 1GB */
};
to
memory {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x20000000>; /* 512MB */
};
the kernel print the following:
[10:37:15:857]Linux version 4.4.45-svn25989 (wuqiong6@Cpl-MT-new-137) (gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09) ) #1 SMP PREEMPT Wed Jul 26 10:36:09 CST 2017
[10:37:15:871]CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d
[10:37:15:872]CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[10:37:15:887]Machine model: TI DRA718 EVM
[10:37:15:887][ 0.000000] Booting Linux on physical CPU 0x0
[10:37:15:888][ 0.000000] Initializing cgroup subsys cpuset
[10:37:15:898][ 0.000000] Initializing cgroup subsys cpu
[10:37:15:899][ 0.000000] Initializing cgroup subsys cpuacct
[10:37:15:907][ 0.000000] Linux version 4.4.45-svn25989 (wuqiong6@Cpl-MT-new-137) (gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09) ) #1 SMP PREEMPT Wed Jul 26 10:36:09 CST 2017
[10:37:15:932][ 0.000000] CPU: ARMv7 Processor [412fc0f2] revision 2 (ARMv7), cr=30c5387d
[10:37:15:933][ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, PIPT instruction cache
[10:37:15:945][ 0.000000] Machine model: TI DRA718 EVM
[10:37:15:947][ 0.000000] bootconsole [earlycon0] enabled
[10:37:15:956][ 0.000000] cma: Reserved 24 MiB at 0x000000009e400000
[10:37:15:968][ 0.000000] Forcing write-allocate cache policy for SMP
[10:37:15:973][ 0.000000] Memory policy: Data cache writealloc
then stop here
