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CCS/TMS320C6748: Problems With Multiple GPIO Pin Read

Part Number: TMS320C6748

Tool/software: Code Composer Studio

Hello. I am attempting to use a TMS320C6748 DSP dev board to read and write to  multiple GPIO inputs. One of the C files given in the TI starterware contains methods to read and write to multiple GPIO pins. My code for this is shown below:

 

 

/**

* main.c

*/

 

//#include "hw_emifa2.h"

//#include "hw_types.h"

//#include "soc_C6748.h"

//#include "uartStdio.h"

//#include "interrupt.h"

//#include "emifa.h"

//#include "evmC6748.h"

#include "hw_gpio.h"

#include "gpio.h"

#include <stdio.h>

#include "soc_C6748.h"

#include "lcdkC6748.h"

#include "hw_syscfg0_C6748.h"

//#include "gpio.c"

#include "psc.h"

#include "hw_types.h"

#define _SOC_C6748_H_

//#include "gpio_v2.c"

 

 

//#define EMIFA_READ_SETUP_RESETVAL               (0x00)

//#define EMIFA_READ_STROBE_RESETVAL              (0x00)

//#define EMIFA_READ_HOLD_RESETVAL                (0x00)

//#define EMIFA_TA_RESETVAL                       (0x00)

 

 

int main(void)

{

    PSCModuleControl(SOC_PSC_1_REGS, HW_PSC_GPIO,

    PSC_POWERDOMAIN_ALWAYS_ON,

    PSC_MDCTL_NEXT_ENABLE);

 

    unsigned int savePinmux =  HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(1));

 

 

    savePinmux &= ~(SYSCFG_PINMUX1_PINMUX1_27_24);

 

    savePinmux |=  (SYSCFG_PINMUX1_PINMUX1_27_24_GPIO0_1 << SYSCFG_PINMUX1_PINMUX1_27_24_SHIFT);

 

 

    savePinmux &= ~(SYSCFG_PINMUX1_PINMUX1_23_20);

 

    savePinmux |=  (SYSCFG_PINMUX1_PINMUX1_23_20_GPIO0_2 << SYSCFG_PINMUX1_PINMUX1_23_20_SHIFT);

 

 

    savePinmux &= ~(SYSCFG_PINMUX1_PINMUX1_19_16);

 

    savePinmux |=  (SYSCFG_PINMUX1_PINMUX1_19_16_GPIO0_3 << SYSCFG_PINMUX1_PINMUX1_19_16_SHIFT);

 

 

    savePinmux &= ~(SYSCFG_PINMUX1_PINMUX1_15_12);

 

    savePinmux |=  (SYSCFG_PINMUX1_PINMUX1_15_12_GPIO0_4 << SYSCFG_PINMUX1_PINMUX1_15_12_SHIFT);

 

 

    HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(1)) = savePinmux;

 

 

    savePinmux = HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(9));

 

 

    savePinmux &= ~(SYSCFG_PINMUX9_PINMUX9_31_28);

 

    savePinmux |=  (SYSCFG_PINMUX9_PINMUX9_31_28_GPIO4_8 << SYSCFG_PINMUX9_PINMUX9_31_28_SHIFT);

 

 

    HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(9)) = savePinmux;

 

    GPIODirModeSet(SOC_GPIO_0_REGS, 2, GPIO_DIR_OUTPUT);

    GPIODirModeSet(SOC_GPIO_0_REGS, 3, GPIO_DIR_OUTPUT);

 

    GPIODirModeSet(SOC_GPIO_0_REGS, 4, GPIO_DIR_OUTPUT);

    GPIODirModeSet(SOC_GPIO_0_REGS, 5, GPIO_DIR_INPUT);

 

    GPIODirModeSet(SOC_GPIO_0_REGS, 73, GPIO_DIR_OUTPUT);

    //GPIOBank4Pin0PinMuxSetup();

    unsigned int baseAdd = SOC_GPIO_0_REGS;

//    unsigned int pinNumber = 73;

//    unsigned int regNumber = 0;

//    unsigned int pinOffset = 0;

//

//    regNumber = (pinNumber - 1)/32;

//

//    pinOffset = (pinNumber - 1) % 32;

//    pinOffset = 1 << pinOffset;

    while(1){

        GPIOMultiplePinsWrite(baseAdd, 0x00000000, 0x00000000);

        printf("%08x\n", GPIOMultiplePinsRead(baseAdd, 0x00000000));

        GPIOMultiplePinsWrite(baseAdd, 0x00000000, 0x00000000);

        printf("%08x\n",GPIOMultiplePinsRead(baseAdd, 0x00000000));

 

        //HWREG(0x01E26000 + GPIO_CLR_DATA(2)) = 256;

        //HWREG(0x01E26000 + GPIO_IN_DATA(2)) = 256;

        //HWREG(0x01E26000 + GPIO_SET_DATA(2)) = 256;

        //HWREG(0x01E26000 + GPIO_IN_DATA(2)) = 256;

    }

 

//    while(1){

//        GPIOPinWrite(SOC_GPIO_0_REGS,73,1);

//        //printf("%d\n", GPIOPinRead(SOC_GPIO_0_REGS, 73)); // GP4[8]

//        GPIOPinWrite(SOC_GPIO_0_REGS,73,0);

//       // printf("%d\n", GPIOPinRead(SOC_GPIO_0_REGS, 73)); // GP4[8]

//    }

}

The code doesn't seem to be working as expected. The code will compile and run, however, the values we read don't match up with the values we write to the pins. My questions are as follows:

These methods use different masks for parameters. how exactly do these masks work, as in how are they related to the pins we read and write to?

Its seems like the masks have to be 32 bits since that is the size of the base address. Is this true, and if so, what GPIO banks do they use?

The C file that these methods come from mention that it is used for a dev board with an AM33xx SoC. Can we only use these methods if we are using a dev board with this SoC?

Thanks for all the help!!

Joseph P

  • Hi Joseph,

    I've forwarded this to the SW experts. Their feedback should be posted here.

    BR
    Tsvetolin Shulev
  • Please note that if you are using Starterware for AM335x then the code will not work as is on C6748 development platform unless you make the SOC level changes to the code. Please download the C6748 Starterware and run code that applies to your evaluation platform.

    processors.wiki.ti.com/.../StarterWare

    Start from the GPIO example here:
    processors.wiki.ti.com/.../StarterWare_01.20.01.01_User_Guide



    Regards,
    Rahul
  • Hey Rahul, thanks for the reply.

    We actually have the Starterware for the C6748 downloaded and have been look at its files in CCS, but the driver folder contained a file called "gpio_v2.c". One of the comments in the code says "This file contains the device abstraction layer APIs for GPIO peripheral present in AM33XX SoC." This file contains a function for reading from multiple GPIO pins, however, that I would really like to use. Would it be a pretty big challenge to make the SOC changes so that I can use this function for my dev board? I did see that the GPIO driver file for the C6748 had a function for writing to an entire bank. Would I be able to make some tweaks to this function to read an entire bank or is that not supported for my dev board?

    Thanks!