RTOS/AM5728: McASP interrupt issue

Part Number: AM5728
Other Parts Discussed in Thread: SYSCONFIG

Tool/software: TI-RTOS

Hi,

I am configuring McASP2 AXR0 for transmitting 32 channel TDM with slot size of 16bit (LSB first) with external Frame Sync Frame (8kHz) and Clock (4.096MHz).

I have enabled only Start of Frame interrupt and hence expecting interrupt to be generated @8kHz but i am getting @half the rate i.e. 4kHz.

Below is the McASP2 configuration code snippet:

// MCASP Pin configuration
mcasp2Ptr->pfunc = 0x0000FFFC;   // CLKs, AXR0 & AXR1 McASP Pin
mcasp2Ptr->pdir = 0x00000001;       // AXR0 as Output, rest are Input

// Configure CH0 Serializer as TX
mcasp2SerControlReg->ch0 = 0x0000000D;
// Configure CH1 Serializer as RX, for future use
mcasp2SerControlReg->ch1 = 0x0000000E;

// RX Rest
mcaspGblCtl->mcaspGblControlBits.rclkrst = 0;
mcaspGblCtl->mcaspGblControlBits.rfrst = 0;
mcaspGblCtl->mcaspGblControlBits.rhclkrst = 0;
mcaspGblCtl->mcaspGblControlBits.rsmrst = 0;
mcaspGblCtl->mcaspGblControlBits.rsrclr = 0;
// TX Reset
mcaspGblCtl->mcaspGblControlBits.xclkrst = 0;
mcaspGblCtl->mcaspGblControlBits.xfrst = 0;
mcaspGblCtl->mcaspGblControlBits.xhclkrst = 0;
mcaspGblCtl->mcaspGblControlBits.xsmrst = 0;
mcaspGblCtl->mcaspGblControlBits.xsrclr = 0;

// Poll until out of Reset
while( (mcasp2Ptr->gblctl & GBLCTRL_BITS_ALL) != 0x00000000 );
// IDLE MODE
mcasp2Ptr->sysconfig = 0x01;

mcasp2Ptr->txmask = 0x0000FFFF;
mcasp2Ptr->txfmt = 0x00000078;
mcasp2Ptr->txtdm = 0xFFFFFFFF;
mcasp2Ptr->xevtctl = 0x00000001;
mcasp2Ptr->txfmctl = 0x00001000;
mcasp2Ptr->txclkchk = 0x00F02000;
mcasp2Ptr->aclkxctl = 0x00000000;
mcasp2Ptr->ahclkxctl = 0x00008000;

// Turn ON CLK and Frame SYNC
mcaspGblCtl->mcaspGblControlBits.xclkrst = 1;
mcaspGblCtl->mcaspGblControlBits.xhclkrst = 1;

// Wait until bit not set
while( !mcaspGblCtl->mcaspGblControlBits.xhclkrst || !mcaspGblCtl->mcaspGblControlBits.xclkrst);

// As first clock error is expected
while( mcaspTxState->mcaspStateBits.clkfail )
{
mcaspTxState->mcaspStateBits.clkfail = 1;
AppDelay(10);
}
// Clear pending interrupts
mcasp2Ptr->txstat = 0xFF;
// Enable Interrupts
mcasp2Ptr->evtctlx = 0x00000080;

// Release TX State machine
mcaspGblCtl->mcaspGblControlBits.xsmrst = 1;