Part Number: PROCESSOR-SDK-AM437X
Tool/software: Linux
Hi
Im trying to understand the DDR3 timings of the TI AM437x IDK device.
From the file board.c for am43xx of the u-boot code, I see the following values:
static const struct emif_regs ddr3_idk_emif_regs_400Mhz = {
.sdram_config = 0x61a11b32,
.sdram_config2 = 0x00000000,
.ref_ctrl = 0x00000c30,
.sdram_tim1 = 0xeaaad4db,
.sdram_tim2 = 0x266b7fda,
.sdram_tim3 = 0x107f8678,
.read_idle_ctrl = 0x00050000,
.zq_config = 0x50074be4,
.temp_alert_config = 0x00000000,
.emif_ddr_phy_ctlr_1 = 0x00008009,
.emif_ddr_ext_phy_ctrl_1 = 0x08020080,
.emif_ddr_ext_phy_ctrl_2 = 0x00000040,
.emif_ddr_ext_phy_ctrl_3 = 0x0000003e,
.emif_ddr_ext_phy_ctrl_4 = 0x00000051,
.emif_ddr_ext_phy_ctrl_5 = 0x00000051,
.emif_rd_wr_lvl_rmp_win = 0x00000000,
.emif_rd_wr_lvl_rmp_ctl = 0x00000000,
.emif_rd_wr_lvl_ctl = 0x00000000,
.emif_rd_wr_exec_thresh = 0x00000405,
.emif_prio_class_serv_map = 0x00000000,
.emif_connect_id_serv_1_map = 0x00000000,
.emif_connect_id_serv_2_map = 0x00000000,
.emif_cos_config = 0x00ffffff
};
I have the following questions:
1) From the register: emif_ddr_ext_phy_ctrl_1 = 0x08020080, - I see the 21st bit is turned off(half delay mode). So, does this mean that the DDr3 is not running at 400 MHz?
2) With these settings, is the DDR3L running in compatible mode or standard mode?
Thanks in advance.
