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PROCESSOR-SDK-AM437X: EtherCAT Slave 3 buffer mode

Part Number: PROCESSOR-SDK-AM437X
Other Parts Discussed in Thread: AM4379

Hi,

I have been working on EtherCAT(PRU-ICSS-EtherCAT_Slave_01.00.03.01) in Processor SDK RTOS(processor_sdk_rtos_am437x_3_03_00_04) for AM4379 IDK board(pdk_am437x_1_0_6).

The ESC is running with Sync manager 2(RxPDO) and Sync manager 3(TxPDO) in buffered mode(3 buffer) and Sync Manager 0 and Sync Manager 1 in 1 mailbox mode(1 buffer). The ESC is configured to run in SM-Synchron Mode(Interrupt Mode).

On analysis of the 3 buffers of Sync Manager 3(TxPDO Sync Manager), I could observe that after every interrupt when RxPDO is received and the TxPDO is written, the TxPDO buffer is incremented to point to the next buffer of the 3 buffer bank where data is written.

I would like to know when is the Buffer address incremented to point to the next buffer and is there any condition on which is is incremented?

Since the ESC is implemented as a firmware, is there any control at the EtherCAT slave stack level on the incrementing of the 3 buffers. Any ESC registers based which can control the incrementing of the buffers?

Thanks and Regards
Kirthi

  • The RTOS team have been notified. They will respond here.
  • Hi Biser,

    Thank you for your response

    Any updates from the RTOS team?

    Thanks and Regards

    Kirthi

  • Sorry for the delay. I have escalated your query.
  • Hi Kirthi, please see our reply to your questions and comments below:

    Q1 :I would like to know when is the Buffer address incremented to point to the next buffer and is there any condition on which is is incremented?

    A1: The buffer address is incremented according to the Beckhoff spec of 3 buffer mode (Hardware Data Sheet Section 1 -> 8.1 Buffered Mode). In case of ET1100, the 3 buffer mode is not visible even to the stack side and the access is done by directly accessing the SM address. However, because we implement it in the PRU firmware, we cannot exactly take the same approach as ET1100. In order to get the correct buffer from the stack application, it is important to do the Process Data access by the provided APIs, which ensures the data is read from the correct buffer.

    Q2: Since the ESC is implemented as a firmware, is there any control at the EtherCAT slave stack level on the incrementing of the 3 buffers. Any ESC registers based which can control the incrementing of the buffers?

    A2: There is no control at the Slave stack level on the buffer switching, as it is completely controlled by the firmware. Also there are no such ESC registers which control the 3 buffers.

    Also, could you please tell us about your use case (application), or what exactly is the issue you are facing?. In this way we could try to help you better..

    thank you,

    Paula