Other Parts Discussed in Thread: AM4379
Hi,
I have been working on EtherCAT(PRU-ICSS-EtherCAT_Slave_01.00.03.01) in Processor SDK RTOS(processor_sdk_rtos_am437x_3_03_00_04) for AM4379 IDK board(pdk_am437x_1_0_6).
The ESC is running with Sync manager 2(RxPDO) and Sync manager 3(TxPDO) in buffered mode(3 buffer) and Sync Manager 0 and Sync Manager 1 in 1 mailbox mode(1 buffer). The ESC is configured to run in SM-Synchron Mode(Interrupt Mode).
On analysis of the 3 buffers of Sync Manager 3(TxPDO Sync Manager), I could observe that after every interrupt when RxPDO is received and the TxPDO is written, the TxPDO buffer is incremented to point to the next buffer of the 3 buffer bank where data is written.
I would like to know when is the Buffer address incremented to point to the next buffer and is there any condition on which is is incremented?
Since the ESC is implemented as a firmware, is there any control at the EtherCAT slave stack level on the incrementing of the 3 buffers. Any ESC registers based which can control the incrementing of the buffers?
Thanks and Regards
Kirthi