AM5716: CLKOUT1 clock to Ethernet PHY

Table 4-30 from the AM571x Datasheet SR2.0 Rev. D states:

"Device Clock output 1. Can be used externally for devices with non-critical timing requirements, or for debug, etc..."

Hello, Biser-san,

I well understand your comment. I already added the CLKOUT1 Spec on that sheet.

But the path from xo_osc1 to CLKOUT1  does not use PLL.

Could you please tell me why this signal path without PLL can not be used?

Best regards,

ay0689

This signal has not been timing-closed and cannot be guaranteed to meet the PHY clock requirements.

Hello, Biser,

By the way, how is my question Q1?

I change the connection between DP83822 and AM 5716 as follows.

There is no FUNC_32K_CLK when using this connection.
Also, there is no other 32k clk.

Does the AM 5716 operate properly under the connection?

Best regards,

ay0689

Hello Biser-san,

Could you please tell me the location of AM5716 datasheet/TRM from which you answered?
I could not find these explanation on both datasheet and TRM.

Best regards,
ay0689

Hello Biser-san, 

Thank you for your response.

I verified the contents of section 33.3.4.4 from the AM571x TRM Rev. E.

Thanks and best regards,

ay0689