Hi,
I want to transfer a block of data by EDMA between memory and McBSP2.
Data are written into MCBSPLP_DXR_REG (0x49022000) from a source buffer
by an EDMA channel. And with DLB of McBSP2 enabled, data are read by another
EDMA channel from MCBSPLP_DRR_REG(0x49022008) into a destination buffer.
So far, there's no problem to transfer 1 word per frame each time. However,
when I try to buffer more words into an McBSP frame, my program can't
make it correctly.
Say, to transmit 16-bit/word, 2 word/frame each EDMA trigger, I do the
following settings:
1. MCBSPLP_THRSH2_REG and MCBSPLP_THRSH1_REG are both initialized
with a value of 2.
2. MCBSPLP_XCCR_REG.XDMAEN and MCBSPLP_RCCR_REG.RDMAEN are both enabled.
When I look into MCBSPLP_XBUFFSTAT_REG(0x490220b4), it's always 0x00000500;
and MCBSPLP_RBUFFSTAT_REG(0x490220b8) is changing with a very weird behavior,
it increases by 2 in every DXR write, then decreases by 1 in every DRR read.
These are the content of the two buffers: (The dstBuff1 should be as srcBuff1)
---------------------------
Uint16 srcBuff1[16];
Uint16 srcBuff2[16];
srcBuf1
0x000F0010 0x000D000E
0x000B000C 0x0009000A
0x00070008 0x00050006
0x00030004 0x00010002
dstBuff1 (wrong result)
0x00000010 0x00000010
0x0000000E 0x0000000E
0x0000000C 0x0000000C
0x0000000A 0x0000000A
---------------------------
and, the register values are:
CM_CLKSEL1_PLL: 0x094C0C40
CM_FCLKEN_PER: 0x0003FFFF
CM_ICLKEN_PER: 0x0003FFFF
CM_AUTOIDLE_PER: 0x00000001
CONTROL_DEVCONF0: 0x04000000
***** McBSP2 regs *****
SPCR2: 0x0000_02C3
SPCR1: 0x0000_0001
RCR2: 0x0000_7E00
RCR1: 0x0000_0140
XCR2: 0x0000_7E00
XCR1: 0x0000_0140
SRGR2: 0x0000_201F
SGRG1 0x0000_10FF
PCR: 0x0000_0F00
***********************
I'm not sure about the clock settings to SRGR2 and SRGR1, I might
configure them wrong.
Juliann