Tool/software: Starterware
Hello, we have a customer that has developed a product based on the AM4372. They have managed to connect to their target using XDS200 however when using the standard AM43672 GEL file they are seeing accessed to internal RAM fail during the execution of the GEL file. Please see attached CCS debug output. We have tried reducing the JTAG clock speed but this has not rectified the issue
We also need to understand how to configure the EMIF for 8 bit DDR and how to implement this into the GEL file and the MLO during the debug and boot process respectivly
CortexA9: Output: **** AM437x GP EVM Initialization is in progress ..........
CortexA9: Output: **** Device Type: GP
CortexA9: GEL Output: System input clock is 24MHz
CortexA9: GEL Output: **** AM43xx OPP100 with CLKIN=24MHz is in progress .........
CortexA9: GEL Output: **** Going to Bypass...
CortexA9: GEL Output: **** Bypassed, changing values...
CortexA9: Output: **** Locking PLL
CortexA9: GEL Output: **** MPU PLL locked
CortexA9: GEL Output: **** Core Bypassed
CortexA9: GEL Output: **** Now locking Core...
CortexA9: GEL Output: **** Core locked
CortexA9: GEL Output: **** Calculated PER SD Divisor=4
CortexA9: GEL Output: **** PER DPLL Bypassed
CortexA9: GEL Output: **** PER DPLL Locked
CortexA9: GEL Output: **** Calculated EXTDEV SD Divisor=4
CortexA9: GEL Output: **** EXTDEV DPLL Bypassed
CortexA9: GEL Output: **** EXTDEV DPLL Locked
CortexA9: GEL Output: **** DISP PLL Config is in progress ..........
CortexA9: GEL Output: **** DISP PLL Locked
CortexA9: GEL Output: **** DDR DPLL Bypassed
CortexA9: GEL Output: **** DDR DPLL Locked
CortexA9: GEL Output: **** Setting DDR3 = 400MHz
CortexA9: GEL Output: **** AM43xx OPP100 configuration is done .........
CortexA9: GEL Output: Enabling VTT Regulator...
CortexA9: GEL Output: VTT Regulator Enabled
CortexA9: GEL Output: Starting DDR3 configuration...
CortexA9: Output: EMIF PRCM is in progress .......
CortexA9: Output: EMIF PRCM Done
CortexA9: GEL Output: EMIF CLK enabled...
CortexA9: GEL Output: Waiting for VTP Ready .......
CortexA9: GEL Output: VTP is Ready!
CortexA9: GEL Output: VTP controller enabled
CortexA9: GEL Output: Checking if DLL is ready...
CortexA9: GEL Output: DLL is ready
CortexA9: GEL Output: Configuring DDR IOs and Control Module registers...
CortexA9: GEL Output: Configuration of Control Module registers complete
CortexA9: GEL Output: Setting up DDR3 H/W leveling configuration...
CortexA9: GEL Output: Starting EMIF controller configuration...
CortexA9: Trouble Reading Memory Block at 0x4c000318 on Page 0 of Length 0x4: (Error -1205 @ 0x4C000318) Device memory bus has an error and may be hung. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 7.0.48.0)
CortexA9: GEL: Error while executing OnTargetConnect(): Target failed to read 0x4C000318
at (*((unsigned int *) (0x4C000000+0x0318))|0x00000100) [DCU4_EMIFconfig_HWlvl.gel:10]
at AM43xx_DDR3_config(0) [AM437x_EVMs.gel:18]
at AM43xx_GP_EVM_Initialization() [DCU4.gel:24]
at OnTargetConnect()
CortexA9: Trouble Writing Register CPSR: (Error -1141 @ 0x3D58) Device is not responding to the request. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 7.0.48.0)
CortexA9: GEL: Error calling OnPreFileLoaded(): Target failed to write register CPSR
CortexA9: Trouble Writing Memory Block at 0x80000000 on Page 0 of Length 0x3510: (Error -2130 @ 0x80000000) Unable to access device memory. Verify that the memory address is in valid memory. If error persists, confirm configuration, power-cycle board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 7.0.48.0)
CortexA9: File Loader: Verification failed: Target failed to write 0x80000000
CortexA9: GEL: File: H:\TI CCS\test\hello\Debug\hello.out: Load failed.
CortexA9: Error: (Error -1170 @ 0x0) Unable to access the DAP. Reset the device, and retry the operation. If error persists, confirm configuration, power-cycle the board, and/or try more reliable JTAG settings (e.g. lower TCLK). (Emulation package 7.0.48.0)
CortexA9: Unable to determine target status after 20 attempts
CortexA9: Failed to remove the debug state from the target before disconnecting. There may still be breakpoint op-codes embedded in program memory. It is recommended that you reset the emulator before you connect and reload your program before you continue debugging
