Other Parts Discussed in Thread: TLV320AIC32
HI all,
I would like to make McASP0 output BCLK: 3.072MHz, FS: 48KHz,
I need to adjust the divider of ACLKXCTL and AHCLKXCTL.
but it always output in most approach value ==> BCLK: 3.125MHz, FS: 46.xx KHz
Does anyone has the same problem?
Tai