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AM3352: Simulation issues

z z24
Prodigy 30 points
Part Number: AM3352


Hello

I am working on DDR3 simulation by HyperLynx.

Now I have some issue during parameters setting.

1) it mentioned that Pin D2 and D1 are not defined as differential pair in IBIS module.

2) during ODT IBIS module selectors, for DQS and DQS# cannot be chosen as same model, then it will be reported as an error

Can anyone help me on this?

thanks

  • 0
    TI__Guru**** 393215 points
    The IBIS experts have been notified. They will respond here.
  • 0
    TI__Mastermind 42545 points
    Hi,
    1) The clocks for the AM3352 are not actually driven by a differential output driver. The CK and CKN signals are generated internal to the logic where CKN is a compliment to CK. These are then driven out two separate single-ended drivers.
    2) I am not sure how HyperLinx handles ODT but we have a different model for reads with each ODT value and for writes with the ODT disabled. You need to select the proper model for the ODT you are simulating.
    Regards,
    Bill