Tool/software: Starterware
I'm having trouble reading the data in SPI 1 with CS0.
I'm using bbb with starterware.
I just want to send a byte to the slave register and read this.
Send it is OK, but when I try to read a data, i can not. I see the signals in osciloscope,CS, MOSI and MISO looks fine, the data that i want is there, but I can not read from bbb register.
my setup functions are:
/*
** Configure clock to spi
*/
static void McSPI1ModuleClkConfig(void) {
HWREG(SOC_CM_PER_REGS + CM_PER_L3S_CLKSTCTRL) =
CM_PER_L3S_CLKSTCTRL_CLKTRCTRL_SW_WKUP;
while ((HWREG(SOC_CM_PER_REGS + CM_PER_L3S_CLKSTCTRL) &
CM_PER_L3S_CLKSTCTRL_CLKTRCTRL) != CM_PER_L3S_CLKSTCTRL_CLKTRCTRL_SW_WKUP);
HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKSTCTRL) =
CM_PER_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP;
while ((HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKSTCTRL) &
CM_PER_L3_CLKSTCTRL_CLKTRCTRL) != CM_PER_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP);
HWREG(SOC_CM_PER_REGS + CM_PER_L3_INSTR_CLKCTRL) =
CM_PER_L3_INSTR_CLKCTRL_MODULEMODE_ENABLE;
while ((HWREG(SOC_CM_PER_REGS + CM_PER_L3_INSTR_CLKCTRL) &
CM_PER_L3_INSTR_CLKCTRL_MODULEMODE) !=
CM_PER_L3_INSTR_CLKCTRL_MODULEMODE_ENABLE);
HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKCTRL) =
CM_PER_L3_CLKCTRL_MODULEMODE_ENABLE;
while ((HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKCTRL) &
CM_PER_L3_CLKCTRL_MODULEMODE) != CM_PER_L3_CLKCTRL_MODULEMODE_ENABLE);
HWREG(SOC_CM_PER_REGS + CM_PER_OCPWP_L3_CLKSTCTRL) =
CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP;
while ((HWREG(SOC_CM_PER_REGS + CM_PER_OCPWP_L3_CLKSTCTRL) &
CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL) !=
CM_PER_OCPWP_L3_CLKSTCTRL_CLKTRCTRL_SW_WKUP);
HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) =
CM_PER_L4LS_CLKSTCTRL_CLKTRCTRL_SW_WKUP;
while ((HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) &
CM_PER_L4LS_CLKSTCTRL_CLKTRCTRL) !=
CM_PER_L4LS_CLKSTCTRL_CLKTRCTRL_SW_WKUP);
HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKCTRL) =
CM_PER_L4LS_CLKCTRL_MODULEMODE_ENABLE;
while ((HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKCTRL) &
CM_PER_L4LS_CLKCTRL_MODULEMODE) != CM_PER_L4LS_CLKCTRL_MODULEMODE_ENABLE);
HWREG(SOC_CM_PER_REGS + CM_PER_SPI1_CLKCTRL) &= ~CM_PER_SPI1_CLKCTRL_MODULEMODE;
HWREG(SOC_CM_PER_REGS + CM_PER_SPI1_CLKCTRL) |= CM_PER_SPI1_CLKCTRL_MODULEMODE_ENABLE;
while ((HWREG(SOC_CM_PER_REGS + CM_PER_SPI1_CLKCTRL) &
CM_PER_SPI1_CLKCTRL_MODULEMODE) != CM_PER_SPI1_CLKCTRL_MODULEMODE_ENABLE);
while (!(HWREG(SOC_CM_PER_REGS + CM_PER_L3S_CLKSTCTRL) &
CM_PER_L3S_CLKSTCTRL_CLKACTIVITY_L3S_GCLK));
while (!(HWREG(SOC_CM_PER_REGS + CM_PER_L3_CLKSTCTRL) &
CM_PER_L3_CLKSTCTRL_CLKACTIVITY_L3_GCLK));
while (!(HWREG(SOC_CM_PER_REGS + CM_PER_OCPWP_L3_CLKSTCTRL) &
(CM_PER_OCPWP_L3_CLKSTCTRL_CLKACTIVITY_OCPWP_L3_GCLK |
CM_PER_OCPWP_L3_CLKSTCTRL_CLKACTIVITY_OCPWP_L4_GCLK)));
while (!(HWREG(SOC_CM_PER_REGS + CM_PER_L4LS_CLKSTCTRL) &
(CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_L4LS_GCLK |
CM_PER_L4LS_CLKSTCTRL_CLKACTIVITY_SPI_GCLK)));
}
/*
** This function will call the necessary McSPI APIs which will configure the
** McSPI controller.
*/
static void McSPISetUp(void) {
/* Reset the McSPI instance.*/
McSPIReset(SOC_SPI_1_REGS);
/* Enable chip select pin.*/
McSPICSEnable(SOC_SPI_1_REGS);
/* Enable master mode of operation.*/
McSPIMasterModeEnable(SOC_SPI_1_REGS);
/***********************************************************************/
//cs0
McSPIMasterModeConfig(SOC_SPI_1_REGS, MCSPI_SINGLE_CH,
MCSPI_TX_RX_MODE, MCSPI_DATA_LINE_COMM_MODE_1,
0);
McSPIClkConfig(SOC_SPI_1_REGS, MCSPI_IN_CLK, MCSPI_OUT_FREQ, 0,
MCSPI_CLK_MODE_0);
McSPIWordLengthSet(SOC_SPI_1_REGS, MCSPI_WORD_LENGTH(8), 0);
McSPICSPolarityConfig(SOC_SPI_1_REGS, MCSPI_CS_POL_LOW, 0);
McSPITxFIFOConfig(SOC_SPI_1_REGS, MCSPI_TX_FIFO_ENABLE, 0); //para de enviar dados no cs1
McSPIRxFIFOConfig(SOC_SPI_1_REGS, MCSPI_RX_FIFO_ENABLE, 0);
/**************************************************************************/
}
/*
** This function selects the McSPI pins for use. The McSPI pins
* are multiplexed with pins of other peripherals in the SoC
*/
static void McSPI1PinMuxSetup(void) {
/*
CONTROL_CONF_MCASP0_FSX -> d0
CONTROL_CONF_MCASP0_AXR0 -> d1
CONTROL_CONF_MCASP0_ACLKX -> clk*/
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_MCASP0_ACLKX) = 0x33;
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_MCASP0_FSX) = 0x33;
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_MCASP0_AXR0) = 0x33;
}
/*
** Configure clock to spi
*/
static void McSPI1CSPinMuxSetup() {
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_RTSN(0)) = 0xD; //SPI_1-CS_0
HWREG(SOC_CONTROL_REGS + CONTROL_CONF_UART_RTSN(1)) = 0xC; //SPI_1-CS_1
}
/*
** This function will activate/deactivate CS line and also enable Tx and Rx
** interrupts of McSPI peripheral.
*/
unsigned char McSPIRead(unsigned char reg, unsigned int channel) {
p_tx = txBuffer;
p_rx = rxBuffer;
length = size;
ConsoleUtilsPrintf("\n\rMcSPI read length: %x", length);
/* SPIEN line is forced to low state.*/
McSPICSAssert(SOC_SPI_1_REGS, channel);
/* Enable the McSPI channel for communication.*/
McSPIChannelEnable(SOC_SPI_1_REGS, channel);
/******************************/
McSPITransmitData(SOC_SPI_1_REGS, (unsigned int) (reg), channel);
*lData++ = (unsigned char) McSPIReceiveData(SOC_SPI_1_REGS, channel);
McSPITransmitData(SOC_SPI_1_REGS, (unsigned int) (0x00), channel); //teste remover segunda escrita //nao funfa
*lData++ = (unsigned char) McSPIChannelStatusGet(SOC_SPI_1_REGS, channel);
/******************************************************************************************/
/* Force SPIEN line to the inactive state.*/
McSPICSDeAssert(SOC_SPI_1_REGS, channel);
/* Disable the McSPI channel.*/
McSPIChannelDisable(SOC_SPI_1_REGS, channel);
return 0;
}