AM3358: Boot issues

Hi,

Do you have external 4.7kOhm pullups to VDDSHV6 on pins EMU0 and EMU1?

Hi Bisar,

Yes, we do have them in design and also populated on the boards.

Also on one of the boards, I observed that placing a body capacitance (touching) on BOOT0~4 while powering the board starts that board consistently. So was suspecting if there was a glitch in power supply, however as an experiment, I tried placing 1uF cap near the pull ups and also place 10nF caps on the Boot0~4 - but didn't help.

That particular board still starts with a finger placed on top of the Pull up resistors.

For completeness the chosen SYSBOOT config is

4~0:11100

5: 1

7~6:11

13~8: DON'T CARE (0's)

15~14: 01 (24MHz)

What are the values of the SYSBOOT resistors? What else is connected on the SYSBOOT lines?

Hi Biser,

The SYSBOOT pins are connected with 100K pullup/pull down accordingly. The Interface (LIDD) which is sysboot too, is connected to a FPGA (which is not powered until ARM boots up and switches on the Power)

One more observation.

The BOOT pins are not reaching the high and are stuck at 1.4V in the failed board. In a good board they track the 3V3A supply and reach 2V. Fig1 is the failed board and Fig2 is Good board, Channel 1 is 3v3A and Channel 2 is BOOT0

Figure 1

Figure2

We have made more than 35 boards (in multiple batches) however this is first time I see the problem. There is no change in the design and attached the schematic pages for the ARM.

340-00309-01_IP3_SPIN3A_REV01_ARM_Section.pdf

Hi Biser,

I had trouble with my login, so doing with the other login.

The SYSBOOT pins are pulled up/down with 100K, only BOOT0~4 are pulled low through a configurable switch with a 10K Pull down. We prototyped atleast 30~40 boards in 4 batches and we never had a problem before.

One more observation and this is the problem causing the boot issues, but unable to find the root cause of it and how to contain it. In good board the BOOT pins come up to 2V tracking the VDD_3V3 supply from PMIC (connected to VDDSHV6) as in Figure 1, however in the bad board the boot pins ramp slowly and are only 1.4V, as in Fugure 2. I tried changing the pullups to 10K, still didn't work.

I used JTAG and CCS, configured as AM3358SK, I read the control Status register as 0x00000300, but on a good one it is 0x004003FC.

Figure1

Figure2

Regards,

Prasad.

Hi Biser,

I had trouble with my login, so doing with the other login.

The SYSBOOT pins are pulled up/down with 100K, only BOOT0~4 are pulled low through a configurable switch with a 10K Pull down. We prototyped atleast 30~40 boards in 4 batches and we never had a problem before.

One more observation and this is the problem causing the boot issues, but unable to find the root cause of it and how to contain it. In good board the BOOT pins come up to 2V tracking the VDD_3V3 supply from PMIC (connected to VDDSHV6), however in the bad board the boot pins ramp slowly and are only 1.4V, I tried changing the pullups to 10K, still didn't work.

I used JTAG and CCS, configured as AM3358SK, I read the control Status register as 0x00000300, but on a good one it is 0x004003F

Prasad.

From what I see you have voltage leaks during power supply ramp-up. The PMIC 3.3V rail should not ramp-up like that. From your schematics I cannot see the source of VCC_3.3V_Main. You must ensure that this rail does not come up before the processor 3.3V rails.

Off-topic, another thing I notice is that your Ethernet PHY is at 2.5V IO voltage. The Processor MII/RMII/RGMII pins are either 3.3V or 1.8V. 2.5V is not a permitted voltage.

Hi Biser,

The problem was the FPGA was latching the BOOT pins and we tried a very strong pullup (100 ohms to VDD_3V3A) just as experiment and still didn't help. So I had to find a work around to make sure the latchup is prevented for the duration of the Boot pins values are latched into the control register.

Thanks for the suggestion, it was long doubted the leakages causing the supply ramp-up issue and today I sequenced the VCC_3.3V_Main to VDD_3V3A and that cleared the boot issue and also mostly cleared the supply ramp-up.

Now the boards are booting consistently.

With respect to Ethernet PHY, at the time of design we found it was at the border and also we needed 100/1000 so had to choose that device. Do you have a recommended phy part for 10/100/1000? we can add this to future design changes.

Regards,

Prasad.