Tool/software: Linux
Hi,
I am working on an embedded linux system with kernel on am3352. Previously, I only worked on some simple embedded systems without kernel, where I directly control the hardware. Everything related to kernel is completely new to me. Now I am stuck on device tree. Hope somebody can kindly help me.
I have a FPGA connected through GPMC to am3352. Two pins are designed as GPIO_OUTPUT to trigger FPGA configuration and reset and two pins are designed as GPIO_INPUT to signal READ_DONE and interrupt request. FPGA configuration is stored on the SPI Flash. When pull GPIO_1 low, FPGA will boot to the SPI Flash.
I borrowed the content in am335x-evmsk.dts, added the following part:
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&gpio_keys_s0 &clkout2_pin &ddr3_vtt_toggle>;
gpmc_pins:gpmc_pins{
pinctrl-single,pins = <
0xb8 (PIN_INPUT | MUX_MODE7) /* lcd_data6.gpio2_12 */
0xc4 (PIN_OUTPUT | MUX_MODE7) /* lcd_data9.gpio2_15 */
0xdc (PIN_OUTPUT | MUX_MODE7) /* lcd_data15.gpio0_11 */
0x1b0 (PIN_INPUT | MUX_MODE7) /*GPIO0_19, interrupt req$
>;
};
};
In am33xx.dtsi, I edited the GPMC nodes like following:
ocp {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
ti,hwmods = "l3_main";
gpmc: gpmc@50000000 {
compatible = "ti,am3352-gpmc";
ti,hwmods = "gpmc";
ti,no-idle-on-init;
reg = <0x50000000 0x2000>;
gpmc,num-cs = <7>;
gpmc,num-waitpins = <0>;
#address-cells = <2>;
#size-cells = <1>;
pinctrl-names = "default";
pinctrl-0 = <&gpmc_pins>;
ranges = <0 0 0x8000000 0x1000000>, /*CS0 @addr translates to 0x8000000, s$
<1 0 0x9000000 0x1000000>;/*CS0 is primary, CS1 is secondary FPGA$
fpga_CS0@0,0 {
status = "okay";
#address-cells = <1>;
#size-cells = <1>;
reg = <0 0 0x1000000>;
bank-width = <2>;
gpmc,sync-read;
gpmc,sync-write;
gpmc,burst-read;
gpmc,burst-write;
gpmc,mux-add-data = <2>; /*Address and Data multiplexed*/
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <80>;/*4 FCLK clock cycles*/
gpmc,cs-wr-off-ns = <80>;/*4 FCLK clock cycles*/
gpmc,adv-on-ns = <0>;
gpmc,adv-rd-off-ns = <20>;/*1 FCLK clock cycles*/
gpmc,adv-wr-off-ns = <20>;/*1 FCLK clock cycles*/
gpmc,oe-on-ns = <20>;/*1 FCLK clock cycles*/
gpmc,oe-off-ns = <80>;/*4 FCLK clock cycles*/
gpmc,we-on-ns = <40>;/*2 FCLK clock cycles*/
gpmc,we-off-ns = <60>;/*3 FCLK clock cycles*/
gpmc,rd-cycle-ns = <80>;/*4 FCLK clock cycles*/
gpmc,wr-cycle-ns = <80>;/*4 FCLK clock cycles*/
gpmc,access-ns = <60>;/*3 FCLK clock cycles*/
gpmc,page-burst-access-ns = <20>;/*1 FCLK clock cycles*/
gpmc,bus-turnaround-ns = <0>;/*0 FCLK clock cycles*/
gpmc,cycle2cycle-delay-ns = <20>;/*1 FCLK clock cycles*/
gpmc,wr-data-mux-bus-ns = <20>;/*1 FCLK clock cycles*/
gpmc,wr-access-ns = <60>;/*3 FCLK clock cycles*/
gpmc,cycle2cycle-samecsen = <20>;/*1 FCLK clock cycles*/
gpmc,cycle2cycle-diffcsen = <20>;/*1 FCLK clock cycles*/
};
};
};
So here is my confusion:
1. Is the above modification enough to config these pins as GPIO for my external FPGA to use them? Anything else to edit in dts or other kernel files?
2. How can I pull up/down output pins to operate the FPGA and read input pins from FPGA in user space?
3. If a pin is designed as OUTPUT, and pulse low to trigger FPGA reset, shall I set pinctrl-single, pins as PIN_OUTPUT or PIN_OUTPUT_PULLDOWN?
Any suggestions are highly appreciated.
