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Linux/AM4379: TW9906 video decoder issue

Part Number: AM4379
Other Parts Discussed in Thread: AM4372, TLV320AIC3111, TPS65218

Tool/software: Linux

Sitara Processor Forum:

My client has designed a custom board that uses an AM4379 processor to capture video from a Techwell TW9906 video decoder.

The TW9906 has eight data lines which are connected to CAM_0 through CAM_7 and the decoder's PCLK, VSYNC and HSYNC are also connected to their respective pins on the AM4379. On this design the decoder's I2C signals are routed to the AM4379's I2C2_SDA and I2C2_SCL pins.

I've configured the kernel according to the information contained within the "Linux Core VPFE User's Guide" document with one exception: I've selected the TW9906 decoder support rather than the OV2659 sensor support. I've also compiled the "Multimedia support" as a module.

I've modified am43x-epos-evm.dts to include the proper pin mux setup for CAM_0 through CAM_7 pins as well as the PCLK, VSYNC and HSYNC pins. I've also move the I2C binding from I2C1 to I2C2 and I've replaced each occurrence of ov2659 with tw9906.

The kernel boots successfully to the command line on the custom board and modprobe shows the modules are available.

# modprobe -D tw9906
insmod /lib/modules/4.9.40/kernel/drivers/media/media.ko
insmod /lib/modules/4.9.40/kernel/drivers/media/v4l2-core/videodev.ko
insmod /lib/modules/4.9.40/kernel/drivers/media/v4l2-core/v4l2-common.ko
insmod /lib/modules/4.9.40/kernel/drivers/media/i2c/tw9906.ko

# modprobe -D am437x-vpfe.ko
insmod /lib/modules/4.9.40/kernel/drivers/media/media.ko
insmod /lib/modules/4.9.40/kernel/drivers/media/v4l2-core/videodev.ko
insmod /lib/modules/4.9.40/kernel/drivers/media/v4l2-core/videobuf2-core.ko
insmod /lib/modules/4.9.40/kernel/drivers/media/v4l2-core/videobuf2-v4l2.ko
insmod /lib/modules/4.9.40/kernel/drivers/media/v4l2-core/videobuf2-memops.ko
insmod /lib/modules/4.9.40/kernel/drivers/media/v4l2-core/v4l2-common.ko
insmod /lib/modules/4.9.40/kernel/drivers/media/v4l2-core/videobuf2-dma-contig.ko
insmod /lib/modules/4.9.40/kernel/drivers/media/platform/am437x/am437x-vpfe.ko

I'm able to manually load the all of the dependent modules and the tw9906.ko with no errors.

However, after I load all of the am437x-vpfe.ko dependent modules and then finally load am437x-vpfe.ko, I get the following errors:

# modprobe -v media.ko
[ 281.958715] media: Linux media interface: v0.10
# modprobe -v videodev.ko
[ 289.847537] Linux video capture interface: v2.00
# modprobe -v videobuf2-core.ko
# modprobe -v videobuf2-v4l2.ko
# modprobe -v videobuf2-memops.ko
# modprobe -v v4l2-common.ko
# modprobe -v videobuf2-dma-contig.ko
# modprobe -v am437x-vpfe.ko
[ 349.601145] vpfe 48326000.vpfe: Invalid bus width.
[ 349.606027] vpfe 48326000.vpfe: No platform data
[ 349.612628] vpfe: probe of 48326000.vpfe failed with error -22

I have three questions:
1) Are my design steps correct?
2) What do the errors mean?
3) How do I fix the configuration so that I'm able to capture video from the video decoder.

All help and sugestions will be appreciated.

~Gary

  • The software team have been notified. They will respond here.
  • Please share your dts file.
  • ======

    This dts file is for the ARM MPU AM437X Starter Kit EVM, so tw9906 decoder driver is bound to i2c1.

    ======

    /*
    * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
    *
    * This program is free software; you can redistribute it and/or modify
    * it under the terms of the GNU General Public License version 2 as
    * published by the Free Software Foundation.
    */

    /* AM43x EPOS EVM */

    /dts-v1/;

    #include "am4372.dtsi"
    #include <dt-bindings/pinctrl/am43xx.h>
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/pwm/pwm.h>
    #include <dt-bindings/sound/tlv320aic31xx-micbias.h>

    / {
    model = "TI AM43x EPOS EVM";
    compatible = "ti,am43x-epos-evm","ti,am438x","ti,am43";

    aliases {
    display0 = &lcd0;
    };

    vmmcsd_fixed: fixedregulator-sd {
    compatible = "regulator-fixed";
    regulator-name = "vmmcsd_fixed";
    regulator-min-microvolt = <3300000>;
    regulator-max-microvolt = <3300000>;
    enable-active-high;
    };

    vbat: fixedregulator0 {
    compatible = "regulator-fixed";
    regulator-name = "vbat";
    regulator-min-microvolt = <5000000>;
    regulator-max-microvolt = <5000000>;
    regulator-boot-on;
    };

    lcd0: display {
    /* From Miles' dt. These timings work in u-boot */
    compatible = "panel-dpi";
    label = "lcd";

    panel-timing {
    /* clock-frequency = <71100000>; */
    clock-frequency = <61100000>;
    de-active = <1>;
    pixelclk-active = <0>;

    hactive = <1280>;
    hback-porch = <53>;
    hfront-porch = <53>;
    hsync-len = <53>;
    hsync-active = <1>;


    vactive = <800>;
    vback-porch = <8>;
    vfront-porch = <8>;
    vsync-len = <8>;
    vsync-active = <1>;
    /*
    clock-frequency = <9440000>;
    hactive = <1280>;
    vactive = <800>;
    hfront-porch = <30>;
    hback-porch = <30>;
    hsync-len = <20>;
    vfront-porch = <1>;
    vback-porch = <1>;
    vsync-len = <8>;
    hsync-active = <1>;
    vsync-active = <1>;
    de-active = <1>;
    pixelclk-active = <0>;
    */
    };

    port {
    lcd_in: endpoint {
    remote-endpoint = <&dpi_out>;
    };
    };
    };

    /* fixed 12MHz oscillator */
    refclk: oscillator {
    #clock-cells = <0>;
    compatible = "fixed-clock";
    clock-frequency = <12000000>;
    };

    matrix_keypad: matrix_keypad0 {
    compatible = "gpio-matrix-keypad";
    debounce-delay-ms = <5>;
    col-scan-delay-us = <2>;

    row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH /* Bank0, pin12 */
    &gpio0 13 GPIO_ACTIVE_HIGH /* Bank0, pin13 */
    &gpio0 14 GPIO_ACTIVE_HIGH /* Bank0, pin14 */
    &gpio0 15 GPIO_ACTIVE_HIGH>; /* Bank0, pin15 */

    col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH /* Bank3, pin9 */
    &gpio3 10 GPIO_ACTIVE_HIGH /* Bank3, pin10 */
    &gpio2 18 GPIO_ACTIVE_HIGH /* Bank2, pin18 */
    &gpio2 19 GPIO_ACTIVE_HIGH>; /* Bank2, pin19 */

    linux,keymap = <0x00000201 /* P1 */
    0x01000204 /* P4 */
    0x02000207 /* P7 */
    0x0300020a /* NUMERIC_STAR */
    0x00010202 /* P2 */
    0x01010205 /* P5 */
    0x02010208 /* P8 */
    0x03010200 /* P0 */
    0x00020203 /* P3 */
    0x01020206 /* P6 */
    0x02020209 /* P9 */
    0x0302020b /* NUMERIC_POUND */
    0x00030067 /* UP */
    0x0103006a /* RIGHT */
    0x0203006c /* DOWN */
    0x03030069>; /* LEFT */
    };

    backlight {
    compatible = "pwm-backlight";
    pwms = <&ecap0 0 50000 PWM_POLARITY_INVERTED>;
    brightness-levels = <0 51 53 56 62 75 101 152 255>;
    default-brightness-level = <8>;
    };

    sound0: sound0 {
    compatible = "simple-audio-card";
    simple-audio-card,name = "AM43-EPOS-EVM";
    simple-audio-card,widgets =
    "Microphone", "Microphone Jack",
    "Headphone", "Headphone Jack",
    "Speaker", "Speaker";
    simple-audio-card,routing =
    "MIC1LP", "Microphone Jack",
    "MIC1RP", "Microphone Jack",
    "MIC1LP", "MICBIAS",
    "MIC1RP", "MICBIAS",
    "Headphone Jack", "HPL",
    "Headphone Jack", "HPR",
    "Speaker", "SPL",
    "Speaker", "SPR";
    simple-audio-card,format = "dsp_b";
    simple-audio-card,bitclock-master = <&sound0_master>;
    simple-audio-card,frame-master = <&sound0_master>;
    simple-audio-card,bitclock-inversion;

    simple-audio-card,cpu {
    sound-dai = <&mcasp1>;
    system-clock-frequency = <12000000>;
    };

    sound0_master: simple-audio-card,codec {
    sound-dai = <&tlv320aic3111>;
    system-clock-frequency = <12000000>;
    };
    };
    };

    &am43xx_pinmux {
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&wlan_pins_default>;
    pinctrl-1 = <&wlan_pins_sleep>;

    cpsw_default: cpsw_default {
    pinctrl-single,pins = <
    /* Slave 1 */
    AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */
    AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
    AM4372_IOPAD(0x914, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
    AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxdv.rmii1_rxdv */
    AM4372_IOPAD(0x924, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
    AM4372_IOPAD(0x928, PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
    AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
    AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
    AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */
    >;
    };

    cpsw_sleep: cpsw_sleep {
    pinctrl-single,pins = <
    /* Slave 1 reset value */
    AM4372_IOPAD(0x90c, PIN_INPUT_PULLDOWN | MUX_MODE7)
    AM4372_IOPAD(0x910, PIN_INPUT_PULLDOWN | MUX_MODE7)
    AM4372_IOPAD(0x914, PIN_INPUT_PULLDOWN | MUX_MODE7)
    AM4372_IOPAD(0x918, PIN_INPUT_PULLDOWN | MUX_MODE7)
    AM4372_IOPAD(0x924, PIN_INPUT_PULLDOWN | MUX_MODE7)
    AM4372_IOPAD(0x928, PIN_INPUT_PULLDOWN | MUX_MODE7)
    AM4372_IOPAD(0x93c, PIN_INPUT_PULLDOWN | MUX_MODE7)
    AM4372_IOPAD(0x940, PIN_INPUT_PULLDOWN | MUX_MODE7)
    AM4372_IOPAD(0x944, PIN_INPUT_PULLDOWN | MUX_MODE7)
    >;
    };

    davinci_mdio_default: davinci_mdio_default {
    pinctrl-single,pins = <
    /* MDIO */
    AM4372_IOPAD(0x948, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
    AM4372_IOPAD(0x94c, PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
    >;
    };

    davinci_mdio_sleep: davinci_mdio_sleep {
    pinctrl-single,pins = <
    /* MDIO reset value */
    AM4372_IOPAD(0x948, PIN_INPUT_PULLDOWN | MUX_MODE7)
    AM4372_IOPAD(0x94c, PIN_INPUT_PULLDOWN | MUX_MODE7)
    >;
    };

    i2c0_pins: pinmux_i2c0_pins {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x988, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
    AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
    >;
    };

    i2c1_pins: pinmux_i2c1_pins {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x95c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2cl_scl */
    AM4372_IOPAD(0x958, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
    >;
    };

    i2c2_pins: pinmux_i2c2_pins {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x9e8, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE3) /* i2c2_sda.i2c2_sda */
    AM4372_IOPAD(0x9ec, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE3) /* i2c2_scl.i2c2_scl */
    >;
    };

    nand_flash_x8: nand_flash_x8 {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.SELQSPIorNAND/GPIO */
    AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
    AM4372_IOPAD(0x804, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
    AM4372_IOPAD(0x808, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
    AM4372_IOPAD(0x80c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
    AM4372_IOPAD(0x810, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
    AM4372_IOPAD(0x814, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
    AM4372_IOPAD(0x818, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
    AM4372_IOPAD(0x81c, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
    AM4372_IOPAD(0x870, PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
    AM4372_IOPAD(0x874, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpmc_wpn */
    AM4372_IOPAD(0x87c, PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
    AM4372_IOPAD(0x890, PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
    AM4372_IOPAD(0x894, PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
    AM4372_IOPAD(0x898, PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
    AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
    >;
    };

    ecap0_pins: backlight_pins {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x964, MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
    >;
    };

    spi1_pins: pinmux_spi1_pins {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x990, PIN_INPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_clk */
    AM4372_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
    AM4372_IOPAD(0x998, PIN_INPUT | MUX_MODE3) /* mcasp0_axr0.spi1_d1 */
    AM4372_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 */
    >;
    };

    mmc1_pins: pinmux_mmc1_pins {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
    >;
    };

    qspi1_default: qspi1_default {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x87c, PIN_INPUT_PULLUP | MUX_MODE3)
    AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE2)
    AM4372_IOPAD(0x890, PIN_INPUT_PULLUP | MUX_MODE3)
    AM4372_IOPAD(0x894, PIN_INPUT_PULLUP | MUX_MODE3)
    AM4372_IOPAD(0x898, PIN_INPUT_PULLUP | MUX_MODE3)
    AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)
    >;
    };

    pixcir_ts_pins: pixcir_ts_pins {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a1.gpio1_17 */
    >;
    };

    hdq_pins: pinmux_hdq_pins {
    pinctrl-single,pins = <
    AM4372_IOPAD(0xa34, PIN_INPUT_PULLUP | MUX_MODE1) /* cam1_wen.hdq_gpio */
    >;
    };

    dss_pins: dss_pins {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x820, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 8 -> DSS DATA 23 */
    AM4372_IOPAD(0x824, PIN_OUTPUT_PULLUP | MUX_MODE1)
    AM4372_IOPAD(0x828, PIN_OUTPUT_PULLUP | MUX_MODE1)
    AM4372_IOPAD(0x82c, PIN_OUTPUT_PULLUP | MUX_MODE1)
    AM4372_IOPAD(0x830, PIN_OUTPUT_PULLUP | MUX_MODE1)
    AM4372_IOPAD(0x834, PIN_OUTPUT_PULLUP | MUX_MODE1)
    AM4372_IOPAD(0x838, PIN_OUTPUT_PULLUP | MUX_MODE1)
    AM4372_IOPAD(0x83c, PIN_OUTPUT_PULLUP | MUX_MODE1) /*gpmc ad 15 -> DSS DATA 16 */
    AM4372_IOPAD(0x8a0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 0 */
    AM4372_IOPAD(0x8a4, PIN_OUTPUT_PULLUP | MUX_MODE0)
    AM4372_IOPAD(0x8a8, PIN_OUTPUT_PULLUP | MUX_MODE0)
    AM4372_IOPAD(0x8ac, PIN_OUTPUT_PULLUP | MUX_MODE0)
    AM4372_IOPAD(0x8b0, PIN_OUTPUT_PULLUP | MUX_MODE0)
    AM4372_IOPAD(0x8b4, PIN_OUTPUT_PULLUP | MUX_MODE0)
    AM4372_IOPAD(0x8B8, PIN_OUTPUT_PULLUP | MUX_MODE0)
    AM4372_IOPAD(0x8bc, PIN_OUTPUT_PULLUP | MUX_MODE0)
    AM4372_IOPAD(0x8c0, PIN_OUTPUT_PULLUP | MUX_MODE0)
    AM4372_IOPAD(0x8c4, PIN_OUTPUT_PULLUP | MUX_MODE0)
    AM4372_IOPAD(0x8c8, PIN_OUTPUT_PULLUP | MUX_MODE0)
    AM4372_IOPAD(0x8cc, PIN_OUTPUT_PULLUP | MUX_MODE0)
    AM4372_IOPAD(0x8d0, PIN_OUTPUT_PULLUP | MUX_MODE0)
    AM4372_IOPAD(0x8d4, PIN_OUTPUT_PULLUP | MUX_MODE0)
    AM4372_IOPAD(0x8d8, PIN_OUTPUT_PULLUP | MUX_MODE0)
    AM4372_IOPAD(0x8dc, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS DATA 15 */
    AM4372_IOPAD(0x8e0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS VSYNC */
    AM4372_IOPAD(0x8e4, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS HSYNC */
    AM4372_IOPAD(0x8e8, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS PCLK */
    AM4372_IOPAD(0x8ec, PIN_OUTPUT_PULLUP | MUX_MODE0) /* DSS AC BIAS EN */
    >;
    };

    display_mux_pins: display_mux_pins {
    pinctrl-single,pins = <
    /* GPMC CLK -> GPIO 2_1 to select LCD / HDMI */
    AM4372_IOPAD(0x88C, PIN_OUTPUT_PULLUP | MUX_MODE7)
    >;
    };

    vpfe0_pins_default: vpfe0_pins_default {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x9b0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_hd mode 0*/
    AM4372_IOPAD(0x9b4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_vd mode 0*/
    AM4372_IOPAD(0x9b8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_field mode 0*/
    AM4372_IOPAD(0x9bc, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_wen mode 0*/
    AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_pclk mode 0*/
    AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data8 mode 0*/
    AM4372_IOPAD(0x9c8, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data9 mode 0*/
    AM4372_IOPAD(0xa08, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data0 mode 0*/
    AM4372_IOPAD(0xa0c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data1 mode 0*/
    AM4372_IOPAD(0xa10, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data2 mode 0*/
    AM4372_IOPAD(0xa14, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data3 mode 0*/
    AM4372_IOPAD(0xa18, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data4 mode 0*/
    AM4372_IOPAD(0xa1c, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data5 mode 0*/
    AM4372_IOPAD(0xa20, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data6 mode 0*/
    AM4372_IOPAD(0xa24, PIN_INPUT_PULLUP | MUX_MODE0) /* cam0_data7 mode 0*/
    >;
    };

    vpfe0_pins_sleep: vpfe0_pins_sleep {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x9b0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_hd mode 0*/
    AM4372_IOPAD(0x9b4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_vd mode 0*/
    AM4372_IOPAD(0x9b8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_field mode 0*/
    AM4372_IOPAD(0x9bc, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_wen mode 0*/
    AM4372_IOPAD(0x9c0, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_pclk mode 0*/
    AM4372_IOPAD(0x9c4, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data8 mode 0*/
    AM4372_IOPAD(0x9c8, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data9 mode 0*/
    AM4372_IOPAD(0xa08, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data0 mode 0*/
    AM4372_IOPAD(0xa0c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data1 mode 0*/
    AM4372_IOPAD(0xa10, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data2 mode 0*/
    AM4372_IOPAD(0xa14, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data3 mode 0*/
    AM4372_IOPAD(0xa18, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data4 mode 0*/
    AM4372_IOPAD(0xa1c, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data5 mode 0*/
    AM4372_IOPAD(0xa20, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data6 mode 0*/
    AM4372_IOPAD(0xa24, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7) /* cam0_data7 mode 0*/
    >;
    };

    wlan_pins_default: pinmux_wlan_pins_default {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.gpio1_20 WL_EN */
    AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* gpmc_a7.gpio1_23 WL_IRQ*/
    AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.gpio1_16 BT_EN*/
    >;
    };

    wlan_pins_sleep: pinmux_wlan_pins_sleep {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x850, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a4.gpio1_20 WL_EN */
    AM4372_IOPAD(0x85c, PIN_INPUT | WAKEUP_ENABLE | MUX_MODE7) /* gpmc_a7.gpio1_23 WL_IRQ*/
    AM4372_IOPAD(0x840, PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a0.gpio1_16 BT_EN*/
    >;
    };

    mcasp1_pins: mcasp1_pins {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_ACLKR/MCASP1_ACLKX */
    AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_FSR/MCASP1_FSX */
    AM4372_IOPAD(0x9a8, PIN_OUTPUT_PULLDOWN | MUX_MODE3)/* MCASP0_AXR1/MCASP1_AXR0 */
    AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_AHCLKX/MCASP1_AXR1 */
    >;
    };

    mcasp1_sleep_pins: mcasp1_sleep_pins {
    pinctrl-single,pins = <
    AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE7)
    AM4372_IOPAD(0x9a4, PIN_INPUT_PULLDOWN | MUX_MODE7)
    AM4372_IOPAD(0x9a8, PIN_INPUT_PULLDOWN | MUX_MODE7)
    AM4372_IOPAD(0x9ac, PIN_INPUT_PULLDOWN | MUX_MODE7)
    >;
    };
    };

    &mmc1 {
    status = "okay";
    vmmc-supply = <&vmmcsd_fixed>;
    bus-width = <4>;
    pinctrl-names = "default";
    pinctrl-0 = <&mmc1_pins>;
    cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
    };

    &mac {
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&cpsw_default>;
    pinctrl-1 = <&cpsw_sleep>;
    status = "okay";
    };

    &davinci_mdio {
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&davinci_mdio_default>;
    pinctrl-1 = <&davinci_mdio_sleep>;
    status = "okay";
    };

    &cpsw_emac0 {
    phy_id = <&davinci_mdio>, <16>;
    phy-mode = "rmii";
    };

    &cpsw_emac1 {
    phy_id = <&davinci_mdio>, <1>;
    phy-mode = "rmii";
    };

    &phy_sel {
    rmii-clock-ext;
    };

    &i2c0 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&i2c0_pins>;
    clock-frequency = <400000>;

    tps65218: tps65218@24 {
    reg = <0x24>;
    compatible = "ti,tps65218";
    interrupts = <GIC_SPI 7 IRQ_TYPE_NONE>; /* NMIn */
    interrupt-controller;
    #interrupt-cells = <2>;

    dcdc1: regulator-dcdc1 {
    regulator-name = "vdd_core";
    regulator-min-microvolt = <912000>;
    regulator-max-microvolt = <1144000>;
    regulator-boot-on;
    regulator-always-on;
    };

    dcdc2: regulator-dcdc2 {
    regulator-name = "vdd_mpu";
    regulator-min-microvolt = <912000>;
    regulator-max-microvolt = <1378000>;
    regulator-boot-on;
    regulator-always-on;
    };

    dcdc3: regulator-dcdc3 {
    regulator-name = "vdcdc3";
    regulator-min-microvolt = <1500000>;
    regulator-max-microvolt = <1500000>;
    regulator-boot-on;
    regulator-always-on;
    };

    dcdc4: regulator-dcdc4 {
    regulator-name = "vdcdc4";
    regulator-min-microvolt = <3300000>;
    regulator-max-microvolt = <3300000>;
    regulator-boot-on;
    regulator-always-on;
    };

    dcdc5: regulator-dcdc5 {
    regulator-name = "v1_0bat";
    regulator-min-microvolt = <1000000>;
    regulator-max-microvolt = <1000000>;
    };

    dcdc6: regulator-dcdc6 {
    regulator-name = "v1_8bat";
    regulator-min-microvolt = <1800000>;
    regulator-max-microvolt = <1800000>;
    };

    ldo1: regulator-ldo1 {
    regulator-min-microvolt = <1800000>;
    regulator-max-microvolt = <1800000>;
    regulator-boot-on;
    regulator-always-on;
    };
    };

    at24@50 {
    compatible = "at24,24c256";
    pagesize = <64>;
    reg = <0x50>;
    };

    pixcir_ts@5c {
    compatible = "pixcir,pixcir_tangoc";
    pinctrl-names = "default";
    pinctrl-0 = <&pixcir_ts_pins>;
    reg = <0x5c>;
    interrupt-parent = <&gpio1>;
    interrupts = <17 IRQ_TYPE_EDGE_FALLING>;

    attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;

    touchscreen-size-x = <1024>;
    touchscreen-size-y = <600>;
    };

    tlv320aic3111: tlv320aic3111@18 {
    #sound-dai-cells = <0>;
    compatible = "ti,tlv320aic3111";
    reg = <0x18>;
    status = "okay";

    ai31xx-micbias-vg = <MICBIAS_2_0V>;

    /* Regulators */
    HPVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
    SPRVDD-supply = <&vbat>; /* vbat */
    SPLVDD-supply = <&vbat>; /* vbat */
    AVDD-supply = <&dcdc4>; /* v3_3AUD -> V3_3D -> DCDC4 */
    IOVDD-supply = <&dcdc4>; /* V3_3D -> DCDC4 */
    DVDD-supply = <&ldo1>; /* V1_8AUD -> V1_8D -> LDO1 */
    };

    };

    &i2c1 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&i2c1_pins>;
    clock-frequency = <100000>;

    tw9906_1@30 {
    compatible = "techwell,tw9906";
    reg = <0x30>;

    clocks = <&refclk 0>;
    clock-names = "xvclk";

    port {
    tw9906_1: endpoint {
    remote-endpoint = <&vpfe0_ep>;
    link-frequencies = /bits/ 64 <70000000>;
    /* bus-width = <8>; */
    /* mclk-frequency = <12000000>; */
    };
    };
    };
    };

    &i2c2 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&i2c2_pins>;
    };

    &gpio0 {
    status = "okay";
    };

    &gpio1 {
    status = "okay";
    };

    &gpio2 {
    pinctrl-names = "default";
    pinctrl-0 = <&display_mux_pins>;
    status = "okay";

    p1 {
    /*
    * SelLCDorHDMI selects between display and audio paths:
    * Low: HDMI display with audio via HDMI
    * High: LCD display with analog audio via aic3111 codec
    */
    gpio-hog;
    gpios = <1 GPIO_ACTIVE_HIGH>;
    output-high;
    line-name = "SelLCDorHDMI";
    };
    };

    &gpio3 {
    status = "okay";
    };

    &elm {
    status = "okay";
    };

    &gpmc {
    status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */
    pinctrl-names = "default";
    pinctrl-0 = <&nand_flash_x8>;
    ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */
    nand@0,0 {
    compatible = "ti,omap2-nand";
    reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
    interrupt-parent = <&gpmc>;
    interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
    <1 IRQ_TYPE_NONE>; /* termcount */
    rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
    ti,nand-ecc-opt = "bch16";
    ti,elm-id = <&elm>;
    nand-bus-width = <8>;
    gpmc,device-width = <1>;
    gpmc,sync-clk-ps = <0>;
    gpmc,cs-on-ns = <0>;
    gpmc,cs-rd-off-ns = <40>; /* tCEA + tCHZ + 1 */
    gpmc,cs-wr-off-ns = <40>;
    gpmc,adv-on-ns = <0>; /* cs-on-ns */
    gpmc,adv-rd-off-ns = <25>; /* min( tALH + tALS + 1) */
    gpmc,adv-wr-off-ns = <25>; /* min( tALH + tALS + 1) */
    gpmc,we-on-ns = <0>; /* cs-on-ns */
    gpmc,we-off-ns = <20>; /* we-on-time + tWP + 2 */
    gpmc,oe-on-ns = <3>; /* cs-on-ns + tRR + 2 */
    gpmc,oe-off-ns = <30>; /* oe-on-ns + tRP + 2 */
    gpmc,access-ns = <30>; /* tCEA + 4*/
    gpmc,rd-cycle-ns = <40>;
    gpmc,wr-cycle-ns = <40>;
    gpmc,bus-turnaround-ns = <0>;
    gpmc,cycle2cycle-delay-ns = <0>;
    gpmc,clk-activation-ns = <0>;
    gpmc,wr-access-ns = <40>;
    gpmc,wr-data-mux-bus-ns = <0>;
    /* MTD partition table */
    /* All SPL-* partitions are sized to minimal length
    * which can be independently programmable. For
    * NAND flash this is equal to size of erase-block */
    #address-cells = <1>;
    #size-cells = <1>;
    partition@0 {
    label = "NAND.SPL";
    reg = <0x00000000 0x00040000>;
    };
    partition@1 {
    label = "NAND.SPL.backup1";
    reg = <0x00040000 0x00040000>;
    };
    partition@2 {
    label = "NAND.SPL.backup2";
    reg = <0x00080000 0x00040000>;
    };
    partition@3 {
    label = "NAND.SPL.backup3";
    reg = <0x000C0000 0x00040000>;
    };
    partition@4 {
    label = "NAND.u-boot-spl-os";
    reg = <0x00100000 0x00080000>;
    };
    partition@5 {
    label = "NAND.u-boot";
    reg = <0x00180000 0x00100000>;
    };
    partition@6 {
    label = "NAND.u-boot-env";
    reg = <0x00280000 0x00040000>;
    };
    partition@7 {
    label = "NAND.u-boot-env.backup1";
    reg = <0x002C0000 0x00040000>;
    };
    partition@8 {
    label = "NAND.kernel";
    reg = <0x00300000 0x00700000>;
    };
    partition@9 {
    label = "NAND.file-system";
    reg = <0x00a00000 0x1f600000>;
    };
    };
    };

    &epwmss0 {
    status = "okay";
    };

    &tscadc {
    status = "okay";

    adc {
    ti,adc-channels = <0 1 2 3 4 5 6 7>;
    };
    };

    &ecap0 {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&ecap0_pins>;
    };

    &spi1 {
    pinctrl-names = "default";
    pinctrl-0 = <&spi1_pins>;
    status = "okay";
    };

    &usb2_phy1 {
    status = "okay";
    };

    &usb1 {
    dr_mode = "peripheral";
    status = "okay";
    };

    &usb2_phy2 {
    status = "okay";
    };

    &usb2 {
    dr_mode = "host";
    status = "okay";
    };

    &qspi {
    status = "disabled"; /* Disable GPMC (NAND) when enabling QSPI */
    pinctrl-names = "default";
    pinctrl-0 = <&qspi1_default>;

    spi-max-frequency = <48000000>;
    m25p80@0 {
    compatible = "mx66l51235l";
    spi-max-frequency = <48000000>;
    reg = <0>;
    spi-cpol;
    spi-cpha;
    spi-tx-bus-width = <1>;
    spi-rx-bus-width = <4>;
    #address-cells = <1>;
    #size-cells = <1>;

    /* MTD partition table.
    * The ROM checks the first 512KiB
    * for a valid file to boot(XIP).
    */
    partition@0 {
    label = "QSPI.U_BOOT";
    reg = <0x00000000 0x000080000>;
    };
    partition@1 {
    label = "QSPI.U_BOOT.backup";
    reg = <0x00080000 0x00080000>;
    };
    partition@2 {
    label = "QSPI.U-BOOT-SPL_OS";
    reg = <0x00100000 0x00010000>;
    };
    partition@3 {
    label = "QSPI.U_BOOT_ENV";
    reg = <0x00110000 0x00010000>;
    };
    partition@4 {
    label = "QSPI.U-BOOT-ENV.backup";
    reg = <0x00120000 0x00010000>;
    };
    partition@5 {
    label = "QSPI.KERNEL";
    reg = <0x00130000 0x0800000>;
    };
    partition@6 {
    label = "QSPI.FILESYSTEM";
    reg = <0x00930000 0x36D0000>;
    };
    };
    };

    &hdq {
    status = "okay";
    pinctrl-names = "default";
    pinctrl-0 = <&hdq_pins>;
    };

    &dss {
    status = "ok";

    pinctrl-names = "default";
    pinctrl-0 = <&dss_pins>;

    port {
    dpi_out: endpoint {
    remote-endpoint = <&lcd_in>;
    data-lines = <24>;
    };
    };
    };

    &vpfe0 {
    status = "okay";
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&vpfe0_pins_default>;
    pinctrl-1 = <&vpfe0_pins_sleep>;


    /* Camera port */
    port {
    vpfe0_ep: endpoint {
    remote-endpoint = <&tw9906_1>;
    ti,am437x-vpfe-interface = <0>;
    bus_width = <8>;
    hsync-active = <0>;
    vsync-active = <0>;
    /* hdpol = <0>; */
    /* vdpol = <0>; */
    };
    };
    };


    &mcasp1 {
    #sound-dai-cells = <0>;
    pinctrl-names = "default", "sleep";
    pinctrl-0 = <&mcasp1_pins>;
    pinctrl-1 = <&mcasp1_sleep_pins>;

    status = "okay";

    op-mode = <0>; /* MCASP_IIS_MODE */
    tdm-slots = <2>;
    /* 4 serializer */
    serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
    1 2 0 0
    >;
    tx-num-evt = <32>;
    rx-num-evt = <32>;
    };

    &synctimer_32kclk {
    assigned-clocks = <&mux_synctimer32k_ck>;
    assigned-clock-parents = <&clkdiv32k_ick>;
    };

    ======
  • Check the typo here. It should be bus-width. 


    /* Camera port */
    port {
    vpfe0_ep: endpoint {
    remote-endpoint = <&tw9906_1>;
    ti,am437x-vpfe-interface = <0>;
    bus_width = <8>;
    hsync-active = <0>;
    vsync-active = <0>;
    /* hdpol = <0>; */
    /* vdpol = <0>; */
    };
    };
    };