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AM5728: How to enable USB_DPLL_CLK

Part Number: AM5728
Other Parts Discussed in Thread: CCSTUDIO

Hi,

I have one question regarding to "USB_DPLL_CLK" of AM5728.

I think USBL_DPLL_CLK must be enabled for using USBx module.

At preset, according to the CM_L3INIT_CLKSTCTRL register, CLKACTIVITY_USB_DPLL_CLK bit is "0"(cleared).

I think for USBx module, the status of this bit should be "1".  But it is not in now.

So I would like to know hwo to enable "USB_DPLL_CLK". What register is used for this clk?

Please advise me.

I appreciate your quick reply.

Best regards,

Michi 

  • Hi Michi,

    What value you have in bits CM_L3INIT_CLKSTCTRL[1:0] CLKTRCTRL ?

    See AM572x TRM (Figure 3-43. PRM Clock Manager Overview), USB_DPLL_CLK clock is derived directly from SYS_CLK1. Make sure SYS_CLK1 is active.

    Regards,
    Pavel
  • Dear Pavel-san,

    Thank you for your reply.

    According to the clock tree tool, one switch is between SYS_CLK1 and USB_DPLL_CLK. Please see the below screenshot.

    Is this switch always closed? Or is it opened by some condition?

    CLKTRCTRL [1:0] bit of CM_L3INIT_CLKSTCTRL are 0x3.

    I appreciate your quick reply.

    Best regards,

    Michi

  • Michi,

    Per mine understanding this switch is open when L3INIT clock domain transition from active to sleep.

    Can you change CLKTRCTRL [1:0] bit of CM_L3INIT_CLKSTCTRL to 0x0 and then check again bit [12] CLKACTIVITY_USB_DPLL_CLK.

    Regards,
    Pavel
  • Dear Pavel-san,

    Thank you for your quick reply.

    I changed CLKTRCTRL[1:0] bit to 0x0, and I checked the bit [12]  CLKACTIVITY_USB_DPLL_CLK after "refresh view".

    Please see the below.

    The switch_USB_DPLL_CLK is still closed. But CLKACTIVIT_USB_DPLL_CLK bit is "0". This is strange.

    I tried other bit setting of CLTRCTRL[1:0]. All setting "0x1", "0x2", "0x3" are same results. Switch is closed, and CLKACTIVITY bit is still "0".

    I don't know the reason.

    Please advise me again.

    I appreciate your continuous support.

    Best regards,

    Michi

  • Michi,

    How do you check bit [12] CLKACTIVITY_USB_DPLL_CLK? Is it from within CTT tool only? I suspect this is CTT tool malfunction (as it is marked as "closed" and "0" at the same time).

    I would suggest you to check this bit withing CCStudio or u-boot or kernel/user space.

    Regards,
    Pavel
  • Dear Pavel-san,

    Thank you for your continuous support.

    I checked the bit [12] CLKACTIVITY_USB_DPLL_CLK. As you said, CTT tool seems to have malfunction. I confirmed the bit[12] was changed by bit [1:0] CLKTRCTRL.

    But I don't know one thing.
    When Linux OS is running, I checked the register. In this time, USB port is enabled.
    When I changed the CLKTRCTRL bit[1:0] setting from 0x3 to 0x0, bit[12]CLKACTIVITY_USB_DPLL_CLK becomes to 0x0. But USB port is still enabled. I think USB port is disabled when USB_DPLL_CLK is gated.

    Also I changed the DPLL_EN bit[2:0] of CM_CLKMODE_DPLL_USB from 0x7 to 0x1 or 0x5. But USB port still alived.
    Why isn't USB port disabled by register setting? Please advise me.

    I appreciate your quick reply.

    Best regards,
    Michi
  • Michi,

    Michi Yama said:
    When I changed the CLKTRCTRL bit[1:0] setting from 0x3 to 0x0, bit[12]CLKACTIVITY_USB_DPLL_CLK becomes to 0x0. But USB port is still enabled.

    How do you verify that USB port is enabled/disabled? Do you check some register/bit? Which exactly?

    Can you try to change CLKTRCTRL bit[1:0] setting from 0x3 to 0x1, then check again bit[12]CLKACTIVITY_USB_DPLL_CLK and USB port.

    Michi Yama said:
    I think USB port is disabled when USB_DPLL_CLK is gated.

    DPLL_USB can be supplied also from USB_DPLL_HS_CLK. You might check if this is the case you have.

    Michi Yama said:
    Also I changed the DPLL_EN bit[2:0] of CM_CLKMODE_DPLL_USB from 0x7 to 0x1 or 0x5. But USB port still alived.
    Why isn't USB port disabled by register setting? Please advise me.

    DPLL_USB provides the functional clock to USB modules. To completely disable USB modules you should also disable interface clock signals. See Table 3-182. CD_L3INIT Modules Clocks Association of the AM572x TRM.


    Regards,
    Pavel

  • Dear Pavel-san,

    Thank you for your quick reply.

         > How do you verify that USB port is enabled/disabled? Do you check some register/bit? Which exactly?

         > Can you try to change CLKTRCTRL bit[1:0] setting from 0x3 to 0x1, then check again bit[12]CLKACTIVITY_USB_DPLL_CLK and USB port.

    I verified that USB port is enabled by inserting USB mouse.

    When Linux OS is running, I executed the below action.

    On CCS with Am572x GP EVM,

    1) Press pause button. In this time, CM_L3INIT_CLKSTCTRL register value is 0x30C5387C(This means both USB_DPLL_HS_CLK and USB_DPLL_CLK are running. Certainly, USB mouse is working in this time.)

    2) On Memory Browser, Change CLKTRCTRL bit [1:0] from 0x0 to 0x3, and press enter key. --> The register value is changed to FFFFFFFD.

    3) Press Run button. USB mouse is still working.

    4) Press Pause button.  The register value is changed to 00000040. This means both USB_DPLL_HS_CLK and USB_DPLL_CLK are gated.

    5) Press Run button. USB mouse is still working. 

    6) Press Pause button. The register value is changed to 30C5387C.

    Also I have strange symptom on CCS.

    As you see from the above, Memory browser window and Registers window shows same register "CM_L3INIT_CLKSTCTRL" register, I think. But register value is different.

    Register value on Registers window shows CLKs are gated. But in this time USB mouse is still working.

    Which register value is correct?

    Best regards,

    Michi

  • Michi,

    Michi Yama said:
    I verified that USB port is enabled by inserting USB mouse.

    I would suggest you to try enable/disable USB1 module (USB3.0) through the CM_L3INIT_USB_OTG_SS1_CLKCTRL register

    Michi Yama said:
    As you see from the above, Memory browser window and Registers window shows same register "CM_L3INIT_CLKSTCTRL" register, I think. But register value is different.

    I think Registers window is the correct one. Check below wiki and e2e thread regarding possible Memory Browser issues (virtual address and incorrect XML file):

    You can double check regarding CCStudio Memory Browser issue in our CCStudio e2e forum.

    Regards,
    Pavel

  • Michi Yama said:

    I have one question regarding to "USB_DPLL_CLK" of AM5728.

    I think USBL_DPLL_CLK must be enabled for using USBx module.

    At preset, according to the CM_L3INIT_CLKSTCTRL register, CLKACTIVITY_USB_DPLL_CLK bit is "0"(cleared).

    I think for USBx module, the status of this bit should be "1".  But it is not in now.

    Do you use Linux? In Linux kernel the usb modules can be enabled/disabled through device-tree, why you have to touch the system clock? what is the issue you are trying to solve?

  • Dear Bin-san,
    Thank you for your reply.

    Regarding to your question, Yes. I use Linux for test. But my customer does not use Linux OS. They use WEC7 OS.
    For this reason, I would like to know the register setting relative USB module.

    Best regards,
    Michi
  • Michi Yama said:
    I would like to know the register setting relative USB module.

    You can enable/disable USB1 module (USB3.0) through the CM_L3INIT_USB_OTG_SS1_CLKCTRL register