TMS320C5505: how to boot to external memory

snapshot as below, burn flash, power cycle, connect JTAG, PC stop in ROM.

change PC to the .out entry point, it runs up.

I guess the ROM code did not jump to entry point after transfer data in flash to RAM/SRAM, and it relate to the -reg_config, maybe ROM code judge some condition before jump, and the condition is not ready.

Hi Tony,

Please confirm. Are you trying to use the bootloader to copy from the boot source to some asynch memory on CS3?
What is your boot source? What is the memory on CS3?

Couple issues with the reg_config parameters...

You are writing to 0x1c05 (Peripheral Reset Control Register (PRCR)) without first writing to 0x1c04 (Peripheral Software Reset Counter Register (PSRCR))
You must always write a minimum value of 0x08 into PSRCR before writing a 1 to any bits in the PRCR
What is the register at 0x1c60 that the reg_config writes to below?

-reg_config 0x1c02,0x0000    - ok ungate all peripherals
-reg_config 0x1c03,0x0000    - ok ungate all peripherals
-reg_config 0x1c05,0x0002    - reset emif, but must first put value > 0x08 inside 0x1c04
-delay 0xff
-reg_config 0x1c33,0x0000    - EMIF Word accesses by the CPU are allowed
-reg_config 0x1c60,0x0000    - what is this register? Should it be 0x1060 - NAND Flash Control Register (NANDFCR)?
-reg_config 0x1014,0x4125    - Asynchronous CS3 Configuration Register 1
-reg_config 0x1015,0x0824    - Asynchronous CS3 Configuration Register 2
-delay 0xff

According to the map file for the C5505 bootloader, the ROM bootloader is still inside of secbootshell getAppData() function with PC = 0xFFA670

orgn(bytes)    orgn(words)     len(bytes)     len(words)    input sections
00ffa4f8      [ 007fd27c ]     000001a6    *           secbootshell.obj (.text:_getAppData)

Maybe can you send your generated .bin file that the hex55 command output so we can look at it with a hex editor...
Can you tell from looking at the memory which sections have been copied and where the bootloader gets stuck? I'm guessing its getting stuck while trying to write to the asynch memory on CS3...

Regards,
Mark

Mark

Thanks for reply, yes, it is 0x1060. I modified with your suggestion, same result. it is booting from 24bit SPI flash to on-chip RAM and CS3 Async ram memory.

-boot
-v5505
-serial8
-reg_config 0x1c02,0x0000
-reg_config 0x1c03,0x0000
-reg_config 0x1c04,0x0020
-reg_config 0x1c05,0x0002
-delay 0x00ff
-reg_config 0x1c33,0x0000
-reg_config 0x1060,0x0000
-reg_config 0x1014,0x4125
-reg_config 0x1015,0x0824
-delay 0x00ff
-b
-o xf.bin
C550xXFLEDtestRaw.out

I am almost sure all sections copied to target memory already. just the timer 0 is not enabled, as I power cycle the board, manually enable timer 0 in CCS, then the bootloader can run out of ROM, and jump to my burned program.

/* Read the boot image */
entry_point = secBoot(read_n_words, write_n_words, index, rom_seed, BootFlags);

/* Clear up the conditions on the boot device */
done();

// if the EBSR have been changed, then restore them
if (emifAddrGPIOFlag==0)
{
// set the EBSR[5:0] to 1 (set those pins for GPIO)
CSL_SYSCTRL_REGS->EBSR |= 0x003F;
// set emifAddrGPIOFlag to 1
emifAddrGPIOFlag = 1;
}

/* If code was successfully loaded, disable the SROM and begin code execution */
if (entry_point)
{
/* Make sure that Timer-0 has counted down to 0 before re-enabling low-voltage detection */
do
{
/* Get the current Timer-0 counter */
Counter = ((Uint32)CSL_TIM_0_REGS->TIMCNT2 << 16) | CSL_TIM_0_REGS->TIMCNT1;
} while (Counter != 0);

EnableLowVoltageDetection();

/* Disable all peripheral clocks */
PeripheralClkEnableOnly(CSL_FMK(SYS_PCGCR1_SYSCLKDIS, 1L));

#ifndef QUICKTURN /* not Quickturn */
/* Disable access to the SROM (unless using QT) */
IOPORT_REG_SECUREROM_CNTL = 0x0001;
#endif

// set XF to low for successful bootloading
toggle_XF(0);

/* Run the loaded application (this is the end of the bootloader -- there is no return) */
branch_to(entry_point);
}

XFRAW.zip

I attache the projects, please look into the debug directory for configuration and snapshots.