Hello.
I'm trying to stop MCLK clock of DDR according to procedure from sprufu3:
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2. Change the SR_PD bit to 0 and set the LPMODEN bit in the DDR2 SDRAM refresh control register (SDRCR) to enable self-refresh mode. The DDR2/mDDR memory controller will complete any outstanding accesses and backlogged refresh cycles and then place the external DDR2/mDDR memory in self-refresh mode. 3. Set the MCLKSTOPEN bit in SDRCR. This enables the DDR2/mDDR memory controller to shut off the MCLK. 4. Poll the PHYRDY bit in the SDRAM status register (SDRSTAT) to be a logic-low indicating that the MCLK has been stopped. =================================================================================== I allocated my code and stack in internal shared RAM. This is the code: #define SR_PD ((unsigned int)1<<23) #define PHYRDY ((unsigned int)1<<2) DDR->SDRCR &= (~SR_PD); // self-refresh while((DDR->SDRSTAT&PHYRDY) != 0) {} Program always polls in the "while", because PHYRDY is always 1. Why? What else should I do before polling PHYRDY?
#define MCLKSTOPEN ((unsigned int)1<<30)
#define LPMODEN ((unsigned int)1<<31)
DDR->SDRCR |= LPMODEN; // low-power
DDR->SDRCR |= MCLKSTOPEN; // shut off the MCLK
