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IMAGE PIPELINE interface with CSI2

Other Parts Discussed in Thread: OMAP3530

Hello I am Karthik,

I am referring to omap 3 processor spruf98g pdf file. In bridge lane shifter table 12.27, four shadings are provided. It is said that only 10 bits are allowed in image pipeline.

The parallel output of CSI2 is 14 bits. For example i am connecting 8 bit data to [13:6] in CSI2. Help me to chose the data lane shifter for image pipeline input.

And moreover why green shading is provided. What is meant by intermediate results?

 

Thanks in advance.

 

With regards,

Karthik.

  • Karthik,

    TRM, SPRUF98F, covers OMAP3 architecture which encompasses a variety of devices.  CSI2  refers to serial interface and is not supported on OMAP3530 as shown in Device Featues, Table 1-3.  In parallel interface (SYNC mode), Camera ISP supports up to 12 bits but majority of image processing operations only support up to 10 bits as you have indicated for image pipeline.  If you are connecting 8 bit parallel data, you should connect to [11:4], [9:2], or [7:0].  If you want to maintain 8 bit data precision, you should choose approproate unshaded cell dependent on your connectivity.   Not exactly sure what is meant by intermediate results for green shading but will look into.