Hello I am Karthik,
I am referring to omap 3 processor spruf98g pdf file. In bridge lane shifter table 12.27, four shadings are provided. It is said that only 10 bits are allowed in image pipeline.
The parallel output of CSI2 is 14 bits. For example i am connecting 8 bit data to [13:6] in CSI2. Help me to chose the data lane shifter for image pipeline input.
And moreover why green shading is provided. What is meant by intermediate results?
Thanks in advance.
With regards,
Karthik.