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Loading symbols on Davinci DSPs - How to on DM648 EVM?

Hi

I'm used to the C55x JTAG interface where you can boot the DSP, then attach your JTAG emulator and connect without having to set the BOOTM pins to emulator boot. This was really helpful since I could load symbols later and set breakpoints.

On the DM648, the CCS can't connect to the EVM without the BOOTM bits set to emulator. Is this a feature of the EVM or is this just how Davinci's work?

Is there a way to connect the JTAG and load symbols after its booted from FLASH (for example).

Thanks

  • Is there actually something in the flash for the DM648 to start executing?

    The reason I ask is that if the flash actually has contents that are valid, the DM648 will start executing this.  You should be able to connect to the running target, provided it is executing meaningful code.
    If the flash is erased, it is unlikely the DM648 is executing meaningful code and therefore may be in the weird state, although I would have thought it would take an exception.

  • Hi Brandon

    If I set the EVM dip switches to boot from flash (SW2-1 off, SW2-2 off, SW2-3 on, SW2-4 off), let it run the demo program (I verified by viewing the video ouput), connect the XDS510 emulator, then in CCS do Debug->Connect, I get the following. You can see at the bottom the output states that connecting is not possible. It requests that I set the dips to all off.

    Cheers

    Eddie

    Invalidate All Cache...
    Invalidate All Cache... Done.
    DSP Reset CPU...
    DSP Reset CPU... Done.
    Disable all EDMA3 interrupts and events.
    Invalidate All Cache...
    Invalidate All Cache... Done.
    DSP Reset CPU...
    DSP Reset CPU... Done.
    Disable all EDMA3 interrupts and events.
    Invalidate All Cache...
    Invalidate All Cache... Done.
    DSP Reset CPU...
    DSP Reset CPU... Done.
    Disable all EDMA3 interrupts and events.
    Invalidate All Cache...
    Invalidate All Cache... Done.
    DSP Reset CPU...
    DSP Reset CPU... Done.
    Disable all EDMA3 interrupts and events.
    Invalidate All Cache...
    Invalidate All Cache... Done.
    DSP Reset CPU...
    DSP Reset CPU... Done.
    Disable all EDMA3 interrupts and events.
    Invalidate All Cache...
    Invalidate All Cache... Done.
    DSP Reset CPU...
    DSP Reset CPU... Done.
    Disable all EDMA3 interrupts and events.

    Connecting Target...
    Setup Cache...
    L1P = 32K   L1D = 32K   L2 = ALL SRAM  
    Setup Cache... Done.
    PLL1 Setup...
    PLL1 Setup for DSP @ 891 MHz, SYSCLK2 = 222.75 MHz, SYSCLK4 = 222.75 MHz.
    PLL1 Setup... Done.
    Power on all PSC modules and DSP domains...
    In DVR mode.
    Power on all PSC modules and DSP domains... Done.
    DDR2 Setup for 32 bits DDR @ 265.9 MHz...
    DDR2 Setup... Done.
    Set Board and DSP Pin Mux...
    Set EVM muxes for 5 video ports SD capture...
    Set EVM muxes for 5 video ports SD capture... Done.
    Set EVM muxes for McASP to AIC access...
    Set EVM muxes for McASP to AIC access... Done.
    Set EVM mux for UART mode.
    Set Board and DSP Pin Mux... Done.
    EMIFB setup ( 16 bits bus )...
    EMIFB setup... Done.
    Set 27 MHz clock for SD video output/capture...
    Set 27 MHz clock for SD video output/capture... Done.
    Configure PCI...
    Configure PCI... Done.
    Setup Board Peripherals...
    Setup Board Peripherals... Done.
    Connecting Target... Done.

    Invalidate All Cache...
    Invalidate All Cache... Done.
    DSP Reset CPU...
    DSP Reset CPU... Done.
    Disable all EDMA3 interrupts and events.
    Invalidate All Cache...
    Invalidate All Cache... Done.
    DSP Reset CPU...
    DSP Reset CPU... Done.
    Disable all EDMA3 interrupts and events.
    Invalidate All Cache...
    Invalidate All Cache... Done.
    DSP Reset CPU...
    DSP Reset CPU... Done.
    Disable all EDMA3 interrupts and events.
    Invalidate All Cache...
    Invalidate All Cache... Done.
    DSP Reset CPU...
    DSP Reset CPU... Done.
    Disable all EDMA3 interrupts and events.
    Invalidate All Cache...
    Invalidate All Cache... Done.
    DSP Reset CPU...
    DSP Reset CPU... Done.
    Disable all EDMA3 interrupts and events.

    Connecting Target...

      *********************** Boot Mode Info **********************
      > [BOOTMODE]  : Master Mode - EMIFB ROM Fast Boot
      > [AECLKINSEL]: EMIF3B Clocked From Internal SYSCLK
      > [PCI66]     : No (33 MHz)
      > [HPIWIDTH]  : 16 Bits
      > [FASTBOOT]  : Yes
      > [EMIFBWIDTH]: 16 bits
      > [PCI]       : ON
      > [ENDIAN]    : Little Endian
      *************************************************************

    THE SYSTEM IS NOT IN EMULATION BOOTMODE!  GEL SETUP WILL NOT RUN!
    If you plan on loading software via the JTAG connector, you should
    disconnect, turn off the device, and set the bootmode switches to
    emulation bootmode (SW2-1, SW2-2, SW2-3, SW2-4 all OFF). Then power
    on the device and try to reconnect.

    Connecting Target... Not Possible!

  • Looks like the fix is to remove any BOOTCFG related "if" statements from Lyrtech's .gel file. Now I can load symbols without having to change the EVM's dip switches.[:$]