I know I saw an explanation for this either on the forum's or the wiki, but now I can't seem to locate it...
In the OMAP/c6748 pin muxing program, the UPP control pins for Channel A are labeled as UPP_CH1... and the Channel B control pins appear to be labeled as UPP_CH0..., which leads to some confusion as to which pin group is which.
Also according to the UPP guide, the Data and XData pins used are not static and depend on the UPCTL configuration further complicating matters.
I want to use the UPP channel B in receive mode interfaced to a 16-bit ADC. If I set the UPCTL bits CHN, IWA, and IWB according to Table 3 in the User's Guide with CHN =1, IWA = 0, and IWB = 1, then I would interface the ADC with:
ADC[15:8] = XDATA[15:8]
ADC[7:0] = DATA[15:8]
CLK = UPP_CH0_CLK (pin G1)
START = UPP_CH0_START (pin G2)
ENABLE = UPP_CH0_ENABLE (pin J4)
WAIT = UPP_CH0_WAIT (pin G3)
Is that correct?