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DM365 IPNC : UBL vsUBOOT version , magic number

reda38
Expert 1455 points

Hello all,

I have an application on a custom board which uses the DM365 and the same flash memory than on the DM365-IPNC.

I have modified and recompiled the UBL code to adapt to my hardware (clock, peripheral clocks, etc...).

I have suceeded in programming the flash, using JTAG and CCSV4 by running the nand_writer.out program. I did this with the recompiled binary of UBL  and the IPNC uboot file named u-boot-1.3.4_ipnc_dm36x_0.6.0.

My problem is that UBL on the serial console (which works), warns me that there is :

"No valid boot image found!

When looking at the code, it is like UBL does not find a right header which includes a valid magic number. For the moment I did not try anything to debug it (bug is fresh). And my question is simple : is that a classical bug/issue ? How to debug it without modyfying th UBL code ?

thanks for your idea.

  • 0
    Expert 1455 points

    Hello again,

    After reading few documents on the web and trying to find exhaustive info on the topic, i find myself with no solution for the moment.

    As far as I understand, the nand_writer application writes both the header information and the data payload for each binary : UBL.bin and uboot.bin.

    Uboot starts after block 25, abd UBL is between 1 and 24.

    To load UBL or uboot to RAM, RBL and UBL respectively look for the header information in the blocks of the NAND zone assigned to each binary.

    RBL looks for a header of UBL in the block 1 to 24, and UBL (once loaded) looks for a header of UBOOT from the block 25 to block 50.

    The first step of my investigation is to find if the NAND writer has written these headers. And it looks like it is the case in the nand_writer log (run under CCSv4):

    for both binaries, header and data are written.

    So the error message is maybe about a bad magic number or else... any ideas ?

    ----------------------------------------------------------

    Starting DM36x_NANDWriter.
    Attempting a global erase of NAND:(y/n)
    y


    Erasing block 0x0 through 0x3FE.


    Enter the binary UBL file Name (enter 'none' to skip) :
    C:\UBL_DM36x_NAND_ARM270_DDR216_OSC24.bin


    Number of blocks needed for header and data: 0x1
    Attempting to start write in block number 0x1.
    Unprotecting blocks 0x1 through 0x1.
    Erasing block 0x1 through 0x4.


    Writing header data to Block 0x1, Page 0x0

    Writing image data to Block 0x4, Page 0x0
    Writing image data to Block 0x4, Page 0x1
    Writing image data to Block 0x4, Page 0x2
    Writing image data to Block 0x4, Page 0x3
    Writing image data to Block 0x4, Page 0x4
    Writing image data to Block 0x4, Page 0x5
    Writing image data to Block 0x4, Page 0x6
    Writing image data to Block 0x4, Page 0x7
    Writing image data to Block 0x4, Page 0x8
    Writing image data to Block 0x4, Page 0x9
    Writing image data to Block 0x4, Page 0xA

    Protecting the entire NAND flash.

    Enter the U-boot or application file name (enter 'none' to skip):
    C:\u-boot-1.3.4_ipnc_dm36x_0.6.0.bin

    Enter the U-boot or application entry point (in hex):
    0x81080000

    Selected entry point is 0x81080000

    Enter the U-boot or application load address (in hex):
    0x81080000

    Number of blocks needed for header and data: 0x2
    Attempting to start write in block number 0x8.
    Unprotecting blocks 0x8 through 0x9.
    Erasing block 0x8 through 0xC.

    Writing header data to Block 0x8, Page 0x0

    Writing image data to Block 0xB, Page 0x0
    Writing image data to Block 0xB, Page 0x1
    Writing image data to Block 0xB, Page 0x2
    Writing image data to Block 0xB, Page 0x3
    Writing image data to Block 0xB, Page 0x4
    Writing image data to Block 0xB, Page 0x5
    Writing image data to Block 0xB, Page 0x6
    Writing image data to Block 0xB, Page 0x7
    Writing image data to Block 0xB, Page 0x8
    Writing image data to Block 0xB, Page 0x9
    Writing image data to Block 0xB, Page 0xA
    Writing image data to Block 0xB, Page 0xB
    Writing image data to Block 0xB, Page 0xC
    Writing image data to Block 0xB, Page 0xD
    Writing image data to Block 0xB, Page 0xE
    Writing image data to Block 0xB, Page 0xF
    Writing image data to Block 0xB, Page 0x10
    Writing image data to Block 0xB, Page 0x11
    Writing image data to Block 0xB, Page 0x12
    Writing image data to Block 0xB, Page 0x13
    Writing image data to Block 0xB, Page 0x14
    Writing image data to Block 0xB, Page 0x15
    Writing image data to Block 0xB, Page 0x16
    Writing image data to Block 0xB, Page 0x17
    Writing image data to Block 0xB, Page 0x18
    Writing image data to Block 0xB, Page 0x19
    Writing image data to Block 0xB, Page 0x1A
    Writing image data to Block 0xB, Page 0x1B
    Writing image data to Block 0xB, Page 0x1C
    Writing image data to Block 0xB, Page 0x1D
    Writing image data to Block 0xB, Page 0x1E
    Writing image data to Block 0xB, Page 0x1F
    Writing image data to Block 0xB, Page 0x20
    Writing image data to Block 0xB, Page 0x21
    Writing image data to Block 0xB, Page 0x22
    Writing image data to Block 0xB, Page 0x23
    Writing image data to Block 0xB, Page 0x24
    Writing image data to Block 0xB, Page 0x25
    Writing image data to Block 0xB, Page 0x26
    Writing image data to Block 0xB, Page 0x27
    Writing image data to Block 0xB, Page 0x28
    Writing image data to Block 0xB, Page 0x29
    Writing image data to Block 0xB, Page 0x2A
    Writing image data to Block 0xB, Page 0x2B
    Writing image data to Block 0xB, Page 0x2C
    Writing image data to Block 0xB, Page 0x2D
    Writing image data to Block 0xB, Page 0x2E
    Writing image data to Block 0xB, Page 0x2F
    Writing image data to Block 0xB, Page 0x30
    Writing image data to Block 0xB, Page 0x31
    Writing image data to Block 0xB, Page 0x32
    Writing image data to Block 0xB, Page 0x33
    Writing image data to Block 0xB, Page 0x34
    Writing image data to Block 0xB, Page 0x35
    Writing image data to Block 0xB, Page 0x36
    Writing image data to Block 0xB, Page 0x37
    Writing image data to Block 0xB, Page 0x38
    Writing image data to Block 0xB, Page 0x39
    Writing image data to Block 0xB, Page 0x3A
    Writing image data to Block 0xB, Page 0x3B
    Writing image data to Block 0xB, Page 0x3C
    Writing image data to Block 0xB, Page 0x3D
    Writing image data to Block 0xB, Page 0x3E
    Writing image data to Block 0xB, Page 0x3F
    Writing image data to Block 0xC, Page 0x0
    Writing image data to Block 0xC, Page 0x1
    Writing image data to Block 0xC, Page 0x2
    Writing image data to Block 0xC, Page 0x3
    Writing image data to Block 0xC, Page 0x4
    Writing image data to Block 0xC, Page 0x5
    Writing image data to Block 0xC, Page 0x6
    Writing image data to Block 0xC, Page 0x7
    Writing image data to Block 0xC, Page 0x8
    Writing image data to Block 0xC, Page 0x9
    Writing image data to Block 0xC, Page 0xA
    Protecting the entire NAND flash.
    Erasing block 0x1B through 0x1F.
    Erasing block 0x300 through 0x3FF.
    Enter the Diagnostic file name (enter 'none' to skip):
    none


    NAND boot preparation was successful!

  • 0 in reply to reda38
    TI__Expert 3425 points

    Few pointers:
    1. The assumption is that DM365 used here is same as that of DM365-IPC. That will ensure that the NAND is compatible
    2. As suggested, the uboot header information should be flashed in blocks 25 to 50. However the logs doesn't suggest any flashing in these NAND blocks.
    3. If you have a JTAG, you can step through the UBL to see why the UBL is not finding the magic number. If not, debug messages can be included in the UBL to see what is going wrong.

    Hope this helps.

    Thanks,
    Gaurav

  • 0 in reply to Gaurav Agarwal
    Expert 1455 points

    Hello Gaurav,

    Thank you for your answer. To answer your points.

    1-The DM365 is nearly the same than the IPNC except for the working frequency. The NAND is a Samsung like on IPNC.

    2-Strange indeed. The uboot header is written in block 8 and the data in the blocks 0xB and 0xC. I think then that this is not a bug in UBL but rather in the nand_writer which looks like incompatible with the UBL code which is looking from block 25 to 50.

    3- I have a JTAG.I will try to step into the UBL precisely to check where error is.

    Keep you aware og this.

    Regards

    Reda

     

  • 0 in reply to reda38
    Expert 1455 points

    Hello all,

    Have found the error source. The nand writer program that i loaded into the RAM is not a proper version. Indeed as the logs show, the uboot header and image were not written into the right blocks (25 to 50). My source code in flash utils was good. But was not correlated with the executable i've got from TI. (do not remember the source exactly - believe it was in either dvsdk or ipnc).

    The wrong version is : nandwriter_ipnc_dm36x_0.2.0.out

    I had to recompile and reload the right version. And then the program worked properly. Same magic number and jumped to uboot execution. My problem is now on uboot which does nothing on the console. My version is u-boot-1.3.4_ipnc_dm36x_0.6.0.

    I consider the nad writer problem solved. I open another topic.

    thanks for info.

  • 0 in reply to reda38
    Prodigy 30 points

    reda38 said:
    u-boot-1.3.4_ipnc_dm36x_0.6.0.

     

    Hello reda38,

    we are on the same project phase as the one you mentionned regarding uboot execution.

    We have the same magic number and jumped to uboot adress 0x81080000 but we don't use TI nand flash. we used a micron flash 128m.

     

    Have you solved your problem ? and if you have allready done it, is it possible to talk with you about that ?

    thank you in advance for your prompt reply

  • 0 in reply to nazim saibi
    Expert 1455 points

    Hello nazim,

    The UBL vs uBoot problem was solved as indicated in the thread. all is related to the flasher utility.

    Concerning the console, the problem is also solved. It depends on the hardware and on which uart you have chosen to output your messages. IPNC's UART is 1 which is PLL-based and divided. UART0 is directly clocked from 24MHz (or else) external oscillator which does not need to be divided. So you have to configre properly your board's configuration file. And also add some dedicated code if any is needed.

    What is your problem on your board ?

    regards

    reda

  • 0 in reply to reda38
    Prodigy 30 points

    Normal 0 21 false false false FR X-NONE X-NONE

    Hello reda38

    Thank you for yout prompt reply !

    We are currently using the TI Serial Flasher  version 1.5 to program the dm365 module (and not the JTAG)

    Being unable to get the TI suggested NAND, we used the MT29F1G08ABCH4-ET.

    During the UBL and u-boot download, here is what we get :

    -----------------------------------------------------

       TI Serial Flasher Host Program for DM36x

       (C) 2009, Texas Instruments, Inc.

       Ver. 1.50

    -----------------------------------------------------

     

     

    Flashing NAND with ubl_297arm_270ddr_ipnc_dm36x_0.3.0.bin and u-boot-1.3.4_ipnc_

    dm36x_0.6.0.bin.

     

     

    Attempting to connect to device com11...

    Press any key to end this program at any time.

     

     

    Waiting for the DM36x...

    BOOTME commmand received. Returning ACK and header...

    ACK command sent. Waiting for BEGIN command...

            Target:   BEGIN

    BEGIN commmand received. Sending CRC table...

     100% [                                                              ]

                               CRC table sent....

     

     

     

    Waiting for DONE...

    DONE received.  Sending the UBL...

     100% [                                                              ]

                                  UBL sent....

     

     

    DONE received.  UBL was accepted.

    UBL transmitted successfully.

     

     

    Waiting for SFT on the DM36x...

            Target: Starting UART Boot...

            Target: BOOTUBL

    BOOTUBL commmand received. Returning CMD and command...

    CMD value sent.  Waiting for DONE...

            Target:    DONE

    DONE received. Command was accepted.

    Sending the UBL image

    Waiting for SENDIMG sequence...

    SENDIMG received. Returning ACK and header for image data...

    ACK command sent. Waiting for BEGIN command...

    BEGIN commmand received.

     100% [                                                              ]

                               Image data sent...

     

     

    Waiting for DONE...

    DONE received.  All bytes of image data received...

            Target: Writing UBL to NAND flash

            Target: Unprotecting blocks 0x00000001 through 0x00000018.

            Target: Number of blocks needed for header and data: 0x0x00000001

            Target: Attempting to start in block number 0x0x00000001.

            Target: Erasing block 0x00000001 through 0x00000001.

            Target: Writing header and image data to Block 0x00000001, Page 0x000000

    00

            Target: Erasing block 0x00000002 through 0x00000002.

            Target: Writing header and image data to Block 0x00000002, Page 0x000000

    00

            Target: Erasing block 0x00000003 through 0x00000003.

            Target: Writing header and image data to Block 0x00000003, Page 0x000000

    00

            Target: Erasing block 0x00000004 through 0x00000004.

            Target: Writing header and image data to Block 0x00000004, Page 0x000000

    00

            Target: Erasing block 0x00000005 through 0x00000005.

            Target: Writing header and image data to Block 0x00000005, Page 0x000000

    00

            Target: Erasing block 0x00000006 through 0x00000006.

            Target: Writing header and image data to Block 0x00000006, Page 0x000000

    00

            Target: Erasing block 0x00000007 through 0x00000007.

            Target: Writing header and image data to Block 0x00000007, Page 0x000000

    00

            Target: Erasing block 0x00000008 through 0x00000008.

            Target: Writing header and image data to Block 0x00000008, Page 0x000000

    00

            Target: Erasing block 0x00000009 through 0x00000009.

            Target: Writing header and image data to Block 0x00000009, Page 0x000000

    00

            Target: Erasing block 0x0000000A through 0x0000000A.

            Target: Writing header and image data to Block 0x0000000A, Page 0x000000

    00

            Target: Erasing block 0x0000000B through 0x0000000B.

            Target: Writing header and image data to Block 0x0000000B, Page 0x000000

    00

            Target: Erasing block 0x0000000C through 0x0000000C.

            Target: Writing header and image data to Block 0x0000000C, Page 0x000000

    00

            Target: Erasing block 0x0000000D through 0x0000000D.

            Target: Writing header and image data to Block 0x0000000D, Page 0x000000

    00

            Target: Erasing block 0x0000000E through 0x0000000E.

            Target: Writing header and image data to Block 0x0000000E, Page 0x000000

    00

            Target: Erasing block 0x0000000F through 0x0000000F.

            Target: Writing header and image data to Block 0x0000000F, Page 0x000000

    00

            Target: Erasing block 0x00000010 through 0x00000010.

            Target: Writing header and image data to Block 0x00000010, Page 0x000000

    00

            Target: Erasing block 0x00000011 through 0x00000011.

            Target: Writing header and image data to Block 0x00000011, Page 0x000000

    00

            Target: Erasing block 0x00000012 through 0x00000012.

            Target: Writing header and image data to Block 0x00000012, Page 0x000000

    00

            Target: Erasing block 0x00000013 through 0x00000013.

            Target: Writing header and image data to Block 0x00000013, Page 0x000000

    00

            Target: Erasing block 0x00000014 through 0x00000014.

            Target: Writing header and image data to Block 0x00000014, Page 0x000000

    00

            Target: Erasing block 0x00000015 through 0x00000015.

            Target: Writing header and image data to Block 0x00000015, Page 0x000000

    00

            Target: Erasing block 0x00000016 through 0x00000016.

            Target: Writing header and image data to Block 0x00000016, Page 0x000000

    00

            Target: Erasing block 0x00000017 through 0x00000017.

            Target: Writing header and image data to Block 0x00000017, Page 0x000000

    00

            Target: Erasing block 0x00000018 through 0x00000018.

            Target: Writing header and image data to Block 0x00000018, Page 0x000000

    00

            Target: Protecting the entire NAND flash.

            Target:    DONE

    Sending the Application image

    Waiting for SENDIMG sequence...

    SENDIMG received. Returning ACK and header for image data...

    ACK command sent. Waiting for BEGIN command...

    BEGIN commmand received.

     100% [                                                              ]

                               Image data sent...

     

     

    Waiting for DONE...

    DONE received.  All bytes of image data received...

            Target: Writing APP to NAND flash

            Target: Unprotecting blocks 0x00000019 through 0x00000032.

            Target: Number of blocks needed for header and data: 0x0x00000002

            Target: Attempting to start in block number 0x0x00000019.

            Target: Erasing block 0x00000019 through 0x0000001A.

            Target: Writing header and image data to Block 0x00000019, Page 0x000000

    00

            Target: Erasing block 0x0000001B through 0x0000001C.

            Target: Writing header and image data to Block 0x0000001B, Page 0x000000

    00

            Target: Erasing block 0x0000001D through 0x0000001E.

            Target: Writing header and image data to Block 0x0000001D, Page 0x000000

    00

            Target: Erasing block 0x0000001F through 0x00000020.

            Target: Writing header and image data to Block 0x0000001F, Page 0x000000

    00

            Target: Erasing block 0x00000021 through 0x00000022.

            Target: Writing header and image data to Block 0x00000021, Page 0x000000

    00

            Target: Erasing block 0x00000023 through 0x00000024.

            Target: Writing header and image data to Block 0x00000023, Page 0x000000

    00

            Target: Erasing block 0x00000025 through 0x00000026.

            Target: Writing header and image data to Block 0x00000025, Page 0x000000

    00

            Target: Erasing block 0x00000027 through 0x00000028.

            Target: Writing header and image data to Block 0x00000027, Page 0x000000

    00

            Target: Erasing block 0x00000029 through 0x0000002A.

            Target: Writing header and image data to Block 0x00000029, Page 0x000000

    00

            Target: Erasing block 0x0000002B through 0x0000002C.

            Target: Writing header and image data to Block 0x0000002B, Page 0x000000

    00

            Target: Erasing block 0x0000002D through 0x0000002E.

            Target: Writing header and image data to Block 0x0000002D, Page 0x000000

    00

            Target: Erasing block 0x0000002F through 0x00000030.

            Target: Writing header and image data to Block 0x0000002F, Page 0x000000

    00

            Target: Erasing block 0x00000031 through 0x00000032.

            Target: Writing header and image data to Block 0x00000031, Page 0x000000

    00

            Target: Protecting the entire NAND flash.

            Target:    DONE

            Target:    DONE

     

    Operation completed successfully.

     

    E:\Camera\Flash\GNU>

     

     

    And here is what we get when booting the card in UART mode :

    ***************

    DM36x initialization passed!

    TI UBL Version: 1.50

    Booting Catalog Boot Loader

    BootMode = NAND

    Starting NAND Copy...

    Valid magicnum, 0xA1ACED66, found in block 0x00000021.

       DONE

    Jumping to entry point at 0x81080000.

    DM365_IPNC_UBL_V03

    ******************

    I assume that the uboot header and image are not written in the right block ? what is your opinion ?

    Thank you again and best regards,

  • 0 in reply to nazim saibi
    Expert 1455 points

    Hello Nazim

    According to your logs, UBL and your application (I think it is uBoot) are properly written and run.

    What you see is the UBL log.

    It starts the "NAND Copy" of your application file (uBoot ?) in NAND to the RAM where it is run.

    What seems disturb you is the fact that the magic number is at block 0x21 ? right ?

    Indeed UBL looks for a valid header with magic number in a whole range of blocks in NAND. The range is from block 25 (0x19) to block 50 (0x32).

    It looks like your magic number has been found in block 0x21. Maybe that your NAND is marked bad in the first blocks (0x19 to 0x20).

    Anyway your booting process looks correct.

    A good way to know what happens exactly is to look at the source code of the serial flasher if you have it.

    Good luck

    reda

  • 0 in reply to reda38
    Prodigy 30 points

    Hello Reda;

    Thanks to your help,  we have found the error source ! The uboot header and image were not written into the right blocks as you mentioned !
    By the way, do you have an idea on the kind of problem we should find now this first part is solved ?
    Thanks again for your great help.
    Best regards

  • 0 in reply to nazim saibi
    Expert 1455 points

    Hello nazim,

    It is nice you found the error.

    Concerning your question, I would answer "Many. Debugging is a lifestyle!".

    More seriously I do no know special issue now. If you can have you kernel and filesystem boot, you are ok. if not there are many resources here to help. Ask when you met them.

    Good luck.

    Reda

  • 0 in reply to reda38
    Prodigy 120 points

    do you have diagnostic_ipnc_dm36x_xxx.bin file? thanks!

    I met the error as well

    DM36x initialization passed!
    TI UBL Base Version: 1.50
    Boot Loader BootMode = NAND
    Starting NAND Copy...
    No valid boot image found!
    NAND Boot failed.
    Aborting...