Other Parts Discussed in Thread: OMAPL138
Hello,
I'm trying to write a function to place the EMAC module in Reset. As I Understood from the documentation, it cannot simply be reset by the softreset register neither by the Power and Sleep Controller. It is needed to ensure first that the EMAC module isn't currently transferring a Frame. To ensure that I want to perform a tear-down and waiting for it to be effective. And that's where I have troubles.
Here is my code :
void EMAC_Stop(void)
{
//Deactivate the Interrupt
// Disable EMAC_C0RX Interrupts
CSL_FINS(aintcRegs->EICR, AINTC_EICR_INDEX, AINTC_EVENTID_EMAC_C0RX);
// Disable EMAC_C0RX Interrupts
CSL_FINS(aintcRegs->EICR, AINTC_EICR_INDEX, AINTC_EVENTID_EMAC_C0TX);
//teardown receive and transmit channels
CSL_FINST(emacRegs->RXTEARDOWN, EMAC_RXTEARDOWN_RXTDNCH, CHA0);
CSL_FINST(emacRegs->TXTEARDOWN, EMAC_TXTEARDOWN_TXTDNCH, CHA0);
//todo add a timeout
while ((0 != emacRegs->RX0HDP) || (0 != emacRegs->TX0HDP))
;
CSL_FINST(emacRegs->TXCONTROL, EMAC_TXCONTROL_TXEN, DISABLE);
CSL_FINST(emacRegs->RXCONTROL, EMAC_RXCONTROL_RXEN, DISABLE);
CSL_FINST(emacRegs->SOFTRESET, EMAC_SOFTRESET_SOFTRESET, RESET);
//todo add a timeout
while (0 != CSL_FEXT(emacRegs->SOFTRESET, EMAC_SOFTRESET_SOFTRESET))
;
CSL_FINS(emacCtlRegs->SOFTRESET, ECTL_SOFTRESET_RESET, 1);
//Put the Module in Reset
// 1. Wait for the GOSTAT[x] bit in PTSTAT to clear to 0. You must wait for any
// previously initiated transitions to finish before initiating a new transition.
while (CSL_FEXT(psc1Regs->PTSTAT, PSC_PTSTAT_GOSTAT0) != 0)
{
;
}
// 2. Set the NEXT bit in MDCTLn to SwRstDisable (0), SyncReset (1), Disable (2h),
// Enable (3h), Auto Sleep (4h) or Auto Wake (5h).
CSL_FINST(psc1Regs->MDCTL[CSL_PSC_EMAC], PSC_MDCTL_NEXT, SWRSTDISABLE);
// 3. Set the GO[x] bit in PTCMD to 1 to initiate the transition(s).
CSL_FINST(psc1Regs->PTCMD, PSC_PTCMD_GO0, SET);
// 4. Wait for the GOSTAT[x] bit in PTSTAT to clear to 0. The modules are safely
// in the new states only after the GOSTAT[x] bit in PTSTAT is cleared to 0.
while (CSL_FEXT(psc1Regs->PTSTAT, PSC_PTSTAT_GOSTAT0) != 0)
{
;
}
}
Sometimes it stay stuck at the following line : while ((0 != emacRegs->RX0HDP) || (0 != emacRegs->TX0HDP))
Just after the tear-down are initiated. I expect TX0HDP to be null after the tear-down is completed. I've also checked (with the debugger), the descriptor flags of the Frame descriptor starting by the one pointed by the TX0HDP.
Did I misunderstood the shutdown procedure needed by the EMAC module or the behaviour of the tear-down ?
Best Regards
Arthur