Linux/DRA746: PAD muxing issue

Rajee Sankar

Part Number: DRA746

Tool/software: Linux

Hi All,

We are trying to access SDIO in Jacinto6 board. After setting clock and initialization sequence, sending CMD0 and CMD5. For CMD5, If I'm writing response type as 'no response', getting CC complete. But for 48 bit or 136 bit response option in CMD register, its not giving response back. In some of the posts, for the same problem, they suggested to do MMC_CLK's pad muxed as INPUT_ENABLE for OMAP series processor. I'm trying to do the same in dra7xx processor also. But I'm not finding the input_enable option in CTRL_CORE_PAD_MMC1_CLK register. Is there any other option to do here? Please advice.

Thank you.

Regards,

RajeeSankar

over 8 years ago

0 Mariya Petkova over 8 years ago

TI__Expert 4885 points

Hi, Rajee Sankar,

There is a table note under Table 18-5. Description Of The Pad Configuration Register Bits in Technical Reference Manual, that means that you should program Active bits, for example in CTRL_CORE_PAD_MMC1_CLK MMC1_CLK_ACTIVE[8]:

"(1) To enable/disable the input buffers of the mmc1_* pads the ACTIVE bits of the corresponding CTRL_CORE_PAD_x registers
are used. These registers have ACTIVE bits instead of INPUTENABLE bits."

Also, check 18.4.6.1.3 Pad multiplexing for further information about multiplexing.

Regards,
Mariya

0 Rajee Sankar over 8 years ago in reply to Mariya Petkova

Intellectual 295 points

Thanks for the information Mariya Petkova!

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Linux/DRA746: PAD muxing issue