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AM5726: Clock switching from OSC0 to OSC1

Part Number: AM5726

Hi.  I am using the AM5726 in a system with external FPGAs doing other functions.  It's desirable to have all the devices synchronized on the same clock but I need the MPU to start-up before the FPGAs.  I was thinking I could use a 20MHz crystal (on OSC0 inputs) during power-up, then once I know the FPGAs and system clocks are stable switch the MPU to use OSC1 with the external 20MHz clock.  However, it's not clear to me what precautions I need to take to insure the MPU operation is not interrupted and/or a reset does not occur.  Can you explain if this switchover will work and what I need to do to ensure sucessful clock switch?

Thanks,

Charles

  • Hi,

    If you look at Figure 3-43 from the AM572x TRM Rev. I, you will see that most DPLL clocks plus some others can only be derived from SYS_CLK1, that's OSC0 clock. I don't think that what you propose will work. Have you considered using an external 20MHz clock on OSC0 and gating it to FPGAs under AM572x control?