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HRDY behavior during multiplexed mode read operations on DM6437

Fabrizio
Intellectual 460 points

Hi,

I am developing a video application with DM6437. I need to send video frame to a PC Host, via USB 2.0. To perform this I have an external device that read video frame from HPI port. In my application HPI read data from DDR2 memory, and video port write video frame data to DDR2 memory too. I have a mechanism that guarantees that video port write data in a memory region not overlapping with read memory region. Relating to document SPRU998D (HPI User Guide), page 19, Figure 9, I read that HRDY# goes high only for the first halfword access, and subsequent HPID read cycles do not cause HRDY# to go high. Is this always guaranteed, or maybe any situations where HPI's DMA can not get data and then HRDY go high? It is important for me, because if it is true, after first halfword I can no sample HRDY# signal and so I can get more speed to transfer data, because HRDY# signal setup time is relevant.

Thanks

Fabrizio