AM5K2E04: BIT DESKEW REGISTER

Juli Olenick

Prodigy 10 points

Part Number: AM5K2E04

How is the bit deskew register (DDR3) implemented? Is it always "on"?

How do we control the bits?

over 8 years ago

0 Cvetolin Shulev-XID over 8 years ago

TI__Guru 65405 points

I've forwarded your query to the hardware design experts. Their feedback should be posted here.

BR
Tsvetolin Shulev

0 Bill Taboada over 8 years ago

TI__Mastermind 42545 points

Hi Juli,
The deskew needed is determined during the training process. Once the value has been determined for your design during the DDR initialization, you shouldn't have to do anything more.
Regards, Bill

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AM5K2E04: BIT DESKEW REGISTER