CCS/TMS320C6748: Debug code vs RAM code

Mike Rosing

Part Number: TMS320C6748

Tool/software: Code Composer Studio

I have chased down a problem where my code runs off into the weeds (i.e. starts executing in data space). What I find with CCS is that the code in memory is correct, the debugger reports the address correctly, but the code it shows is not the same as the code in RAM. While my first thought was "that's impossible!", I realized there is instruction cache on this device and it is possible the code being executed has not been loaded correctly from RAM. How can I test this theory, and which manuals should I read to fully understand the "automatic" instruction cache operations?

Thanks,

Mike

over 8 years ago

0 Mike Rosing over 8 years ago

Intellectual 360 points

I dumped the previously run program at that address and found the same instructions the CCS debugger showed. So it does look like a cache consistency problem - I need to tell the cache to "reset". I found the manual "C674x DSP Cache User's Guide", so hopefully I'll find the right bits in there.

0 Yordan Kovachev over 8 years ago in reply to Mike Rosing

TI__Guru**** 161600 points

Hi Mike,

Yes, the TMS320C674x DSP Cache User's Guide explains the fundamentals of memory caches and describes how the two-level cache-based internal memory architecture in the TMS320C674x digital signal processor (DSP) can be efficiently used in DSP applications.

Best Regards,
Yordan

0 Mike Rosing over 8 years ago in reply to Yordan Kovachev

Intellectual 360 points

Yes, what I found was I had to use register L1PINV. I set bit 0 to 1 and then waited for it to clear. My code runs perfectly now! It was described on page 37 of the Cache Users Guide.

Mike

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CCS/TMS320C6748: Debug code vs RAM code