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Shared memory (variables)

Other Parts Discussed in Thread: TMS320C6472

Hello,

I am using the TI TMS320C6472 six-core EVM for parallel processing. I have read the “Multicore Processing Guide” (http://www.ti.com/litv/pdf/sprab27a), which has some information about how the each core can access either “local” or “shared” memory. However, that document doesn't have any examples or sample code. Could somebody point out to me where I can find examples of programs or app notes on sharing data between cores? For example:

  • An integer variable that is set in one program and accessed (read) in another

  • A shared array whose first half is filled by one program, the other half by another

Thanks,
Andrey

  • Andrey,

    Which version of CCS are you using? I am using CCSv4.2.0.09 with BIOS 5.41.07.

    When you create a new CCS Project and go through the various steps to tell CCS what processor and compiler and dependencies, and such, the last box is Project Templates. One of the selections is "IPC (multicore and I/O)" and when you expand it, there are two project templates for C6472. These may be useful to try out. I have not tried them, so I would like to hear back from you how helpful they are.

    There is a thread titled "How to synchronize the three cores of C6474 without DSP/BIOS". I have not adapted the example code there to fit the C6472 and it is targeted to CCSv3.3, but it might serve as a starting point for you if you are still looking for more than the CCS examples, above. The thread has a lot of discussion about multi-core issues and links to other sources of information.

     

    If this answers your question, please click  Verify Answer  on this post and tell us about your results; if not, please reply back with more information to help us answer your question.

  • Randy-

    What we really need are simple project examples that show:

      -a memory section defined in the DSP/BIOS config GUI, that we can change

      -a periodic task that runs on one core -- where is the Periodic Function
       Manager in the GUI?  Seems it's not there

      -how to associate a task with a specific core?

    These things are easy in CCS3.   CCS4 seems obscure and difficult to use.  Where are the example projects for such basics?  For now simply having two cores communicate via shared memory would be fine.

    -Jeff

     

  • Jeff Brower said:
    These things are easy in CCS3.   CCS4 seems obscure and difficult to use.

    That was me six months ago. I have used CCS 3.x for a long time, know it well, and I did not hanker to CCSv4 at all. But I came to accept that CCSv4 is what we are moving forward with and the DSP experts out there like you will be moving to it whether I like it or not. I just had to force myself to buy into it, and in spite of things I still do not like and things that do not work the same as 3.3, it has some nice features for those of us using multi-cores.

    Search the TI Wiki pages for multi-core and you will find some helpful topics.

    Jeff Brower said:
    What we really need are simple project examples that show:

      -a memory section defined in the DSP/BIOS config GUI, that we can change

      -a periodic task that runs on one core -- where is the Periodic Function
       Manager in the GUI?  Seems it's not there

      -how to associate a task with a specific core?

    In my previous post, I told you how to use the Project Templates. These were not available in CCS 3.3, but they are in CCSv4. It is the easiest way to start on a DSP/BIOS-based project. You can do all the steps manually if you want, but it is a lot easier this way.

    Once you have a .tcf file for your DSP/BIOS-supported project, open the tcf file and you have pretty much the same GUI you had in 3.3. Memory sections are the same, PRDs are the same, TSKs are the same.

    You do not associate a specific task with a specific core. You build a program that gets loaded on a specific core. That program is independent of the programs loaded onto the other cores, unless you specifically make the programs dependent by sharing memory space. That program can have all the tasks you want, and they will all run on the core that the program gets loaded on.

    Jeff Brower said:
        *      An integer variable that is set in one program and accessed (read) in another
        *      A shared array whose first half is filled by one program, the other half by another



    In the example code that I told you about in the previous post, look in main.c for InterCoreComm. It is a small array that I use for synchronizing the cores, and is used in this case to avoid sharing the same memory location by using different items in a shared array. You can use the same technique to allocate an array of any size to use as shared or common memory space for all the cores.

    Use element 0 for one core to set and another to read.

    Make it big and let Core0 access elements 0-99 and Core1 access elements 100-199.

  • Randy-

    Thanks for the informative answer.  This is great advice, we will follow your instructions.

    A couple of brief follow-up questions (just want to make sure I understand):

      -when you say open a .tcf file, you mean using a standard text editor, correct?

      -is it reasonable to assume that as CCS4 improvements continue, some
       GUI sections may be returning, for example mem section definition?  In any
       case it seems that editing the .tcf file is the best approach and we should
       avoid adding things to the linker command file when possible

    Thanks again.

    -Jeff

     

  • Jeff Brower said:
      -when you say open a .tcf file, you mean using a standard text editor, correct?

    Although it can be useful to edit the tcf file as a text file, this bypasses the GUI. In the C/C++ Project window with the list of the files in your active project, you can double-click on the tcf file to open the GUI. This is the same way for CCS 3.3 and CCSv4.

    Jeff Brower said:
      -is it reasonable to assume that as CCS4 improvements continue, some
       GUI sections may be returning, for example mem section definition?

    When you open the GUI as I described above, you will find the Memory Section Manager under the System category. This also is the same for CCS 3.3 and CCSv4.

  • Randy,

    Thanks for your reply. It seems like I need to understand some basics before moving forward. I am a beginner in CCS, so my apologies if my questions look obvious.

    You wrote:

    RandyP said:

    Which version of CCS are you using? I am using CCSv4.2.0.09 with BIOS 5.41.07.

    When you create a new CCS Project and go through the various steps to tell CCS what processor and compiler and dependencies, and such, the last box is Project Templates. One of the selections is "IPC (multicore and I/O)" and when you expand it, there are two project templates for C6472.

     

    I am using CCS v4.0.2.01000. That might explain why I cannot follow your procedure. Here are the steps that I see when I create a new CCS project:

    In "New CCS Project", I specify a project name (the "use default location" box is checked)

    In "Project Type" (next screen), I specify C600

    In "Additional Project Settings" (next screen), I don't specify any dependencies

    Under "CCS Project Settings" (next screen), I leave most default values (output type - executable, device variant - generic C64x+ device, etc.) I then select "Use DSP/BIOS v5.xx" (5.41.00.06 is the only version that I see there).

    Then I click "Finsh", and the project is created. I do not see any project templates you mention.

    There ARE project templates when I select "Enable RTSC support" in the last screen. Under "Inter-processor communication", there are several templates, but I don't see anything for C6472 specifically.

     

     

     

  • That is too bad that these project templates are not available, yet. But at least it is something to look forward to when CCSv4.2 is released. I have no idea what the release schedule is, but hopefully it is soon. I did not find the templates in CCSv4.1, either, but I still recommend that you upgrade to the latest version as soon as possible - there are definitely improvements in 4.1 over 4.0.

    It will help you to download the IPC & BIOS example in the thread I mentioned above. You should have been able to find it from the title by doing a search, but I fixed the posting to include a direct link to the thread where the example code is. There may be some changes needed to work with the C6472, but mostly it should work okay. If you do use it and migrate it to CCSv4 (which means you are a superstar), please File->Export the project to a zip file and post it here (which will prove you are a superstar). Any suggestions on how to improve the comments in the source will be appreciated. If nothing else, looking through the code may help you with generating your own example program.

    For other examples that might be helpful, do a forum search for smmqt. This is the Shared Memory Message Queue Transport example that adds multi-core support to the DSP/BIOS MSGQ feature. See if it looks interesting and let us know if you need more information on it or not.

    In the Training section of TI.com, there is a training video set for the C6472. It may be helpful for you to review all of the modules, in order, to make it easier to understand them all. You can find the complete video set at http://focus.ti.com/docs/training/catalog/events/event.jhtml?sku=OLT110001 .

  • Randy-

    Ok but right now my guys can't even add a mem section.  How can we do that?

    We're using the EVM C6472 which comes with CCS 4.1... it's not possible to get stuck on something this basic, is it?

    -Jeff

     

  • Can you open the GUI by double-clicking the tcf file?

    Do you know how to add a mem section in CCS 3.3?

    What do you mean by "mem section"? Unfortunately, we (TI docs) use both "mem" and "section" in confusingly similar yet different ways.

  • Unfortunately, I cannot open the TCF file because I don't see it being created with the project. Following the steps I described above to create a new CCS project, all I see are some header files under the "Includes" folder. If I understand how to create the TCF file, I can see if I can edit it.

    I did try to open the file the TCF file that came with the example you mentioned (I haven't adapted it to the EVM board, just tried to open the TCF file). It prompted me for the installation directory of  "XDC Tools". On my system, it is C:\Program Files\Texas Instruments\xdctools_3_15_04_70. After that, a window came up where I could indeed edit the memory section. However, since the project doesn't work "out of the box" on my board, I cannot test any changes I make there.

    I will look at adapting it for my board, like you said. However, I still need to have an understanding of how TCF files are created in the first place. If I can get that, I can create some very simple base project that builds right away on my system, to experiment with memory locations.

  • Randy-

    We have many CCS v3.3 projects.  Normally we create mem sections as follows:

      DSP/BIS Config (left hand pane)
             |
             |__ xxx.tcf file
                     |
                     | _ _ System
                             |
                             |__MEM - Memory Section Manager

    As one example, we might then use a DATA_SECTION pragma to ensure a particular variable of buffer is allocated in that section of memory.

    -Jeff

  • The DSP/BIOS GUI works the same in CCSv4, and your DATA_SECTION pragma will work the same, too. The key is to get the project to support DSP/BIOS in the first place.

    I have never tried to import a CCS3 project, but this should result in having DSP/BIOS support in CCSv4 if your CCS3 project had it. I usually start from scratch, which requires that you enable DSP/BIOS support when you create the project - it cannot be added later. If you have DSP/BIOS support, then you can create a DSP/BIOS Configuration file based on whichever platform you want. The order of things is different with CCSv4, not worse or illogical, just different; the GSGs below will help a lot.

    Back at the TI Wiki pages, on the main page click on Code Composer Studio IDE in the center of the page, then pick Code Composer Studio v4. Depending on what you already know about Eclipse and which processors you care about, you can choose whichever topics to start reading from the top of the page. When I decided I was going to join the CCSv4 bandwagon, I started with Eclipse and then the Recommended GSG. In the GSG are links to several very helpful GSGs and the Overview. Read it all, but keep your eyes peeled for BIOS.

  • Hello Randy,

    Thanks for your helpful replies. I was able to make some progress. I downloaded and installed CCS v4.2, in which some options are different. I was able to create a project with DSP/BIOS 5.x support, then add a TCF file to it and configure it to run a periodic task. For exazmple, on memory watch, I was able to see the value of a variable incremented periodically.

    Now, I have another question. I see that the latest BIOS version is 6.3, so I want to use that.. But there is no option to create a "BIOS 6 project". I found this tutorial

    http://processors.wiki.ti.com/index.php/GSG:Using_BIOS#BIOS6_Support

    If I understand correctly, you have to create a RTSC project, and it will have BIOS 6.3 support. In CCS v4.2, I am assuming what used to be called RTSC projects are now SYS/BIOS projects. The problem is, when I create a SYS/BIOS project, it doesn't have a TCF file. Instead, there is a CFG file. From the tutorial above, it appears that this is the file it's talking about:

    "The project will be created and shown in the C/C++ Projects tab. Opening the BIOS 6 configuration file shows the BIOS Graphical Configurator XGCONF."

    I see some tabs in the CFG file that are similar to TCF, like memory and synchronization, but I don't see something that would let me set up periodic tasks (it was under  "PRD" in TCF files). More importantly, I can't edit any values--clicking on them doesn't help. With BIOS 5, most fields were editable in the TCF file. Do you know what am I doing wrong? As always, I appreciate your help.

     

  • Randy-

    I wanted to mention that we previously had CCS v4.02 installed on the same machine, and then un-installed it before installing CCS v4.2.  I've seen cases where older versions off CCS conflicted, so I thought this was worth mentioning.

    We didn't see anything unusual during either the un-install or 4.2 install.

    -Jeff

  • Andrey said:
    I see that the latest BIOS version is 6.3, so I want to use that.

    You are braver than I am. I am just now getting fully up-to-speed on CCSv4.x and am putting off the move to BIOS6, aka SYS/BIOS. If you do go that route and decide to use BIOS6, please post some of your experiences here. But if you have some questions, I recommend starting a new thread or two on the BIOS forum under Embedded Software.

    Keep it quiet for now, but I am working on a Wiki page adaptation of an excellent application note that was written for a non-public multi-core device like the C6472. The app note used CCS 3.3, and I am migrating it to the C6472 and CCSv4.

    When I was having some problems with the third example projects, one of our software experts recommended I look in the IPC examples for some multi-processor examples that could run on the C6472 EVM. You might find that to be helpful, but for me it would have meant moving to BIOS6, which I am not ready for.

    Not to hold you back, and for very self-serving reasons, I would be glad to post the first two project examples to see if they would help you any. They are for BIOS 5.41.07 and may not work as well until the next release of CCSv4.2 comes out (needs 4.2.0.09 for the Printf Logs to work well). The first project just uses the exact same application running on each core. There are different data sections for each core, but they all use shared memory for the program code and most of BIOS. The second project completely isolates each core running similar applications but not sharing anything, just partitioning memory.

    And just FYI, there is a new training class that TI is offering that now covers C6x processors with CCSv4 (and BIOS 5). I know there is a class in a couple of weeks up in Dallas, and it has probably been held or scheduled elsewhere in the US. The class is called "TMS320C674+(tm) DSP System Integration Workshop using DSP/BIOS".