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Does EDMA3 of DM6467T support LINK transfer?

Hi:

    We want to use the LINK transfer of EDMA3 of DM6467T.

    When we use the QDMA channel for LINK transfer, it works.

    But, when we use the EDMA channel for LINK transfer, it does not work: neither data transfered, nor completation interrupt of IPR be captured.

 

    Out initialization of EDMA just do:

    DCHMAP3 = (3 << 5);

    ICR = 0x00000008;

 

    Then, we setup EDMA channel 3 as following:

    ECH3_OPT = 0 // OPT
    | (0 << 23)  // ITCCHEN: Intermediate transfer completion chaining enable
    | (0 << 22)  // TCCHEN: Transfer complete chaining enable
    | (0 << 21)  // ITCINTEN: Intermediate transfer completion interrupt enable
    | (0 << 20)  // TCINTEN: Transfer complete interrupt enable
    | (0 << 12)  // TCC: Transfer complete code
    | (0 << 11)  // TCCMODE: Transfer complete code mode
    | (0 << 8)  // FWID: FIFO Width. 
    | (0 << 3)  // STATIC: Static PaRAM set
    | (0 << 2)  // SYNCDIM: Transfer synchronization dimension
    | (0 << 1)  // DAM: Destination address mode
    | (0 << 0);  // SAM: Source address mode
    ECH3_SRC = demuxDma[row];
    ECH3_CNT = 0x00010000 | 352;
    ECH3_DST = demuxDma[row+1];
    ECH3_BIDX = 0x00000000;
    ECH3_LINK = 0x00014040;      // Note: LINK to PaRAM set 2
    ECH3_CIDX = 0x00000000;
    ECH3_CCNT = 0x00000001

    Then, we setup EDMA PaRAM set 2 as follow:

    S2_OPT = 0 // OPT
   | (0 << 23)  // ITCCHEN: Intermediate transfer completion chaining enable
   | (0 << 22)  // TCCHEN: Transfer complete chaining enable
   | (0 << 21)  // ITCINTEN: Intermediate transfer completion interrupt enable
   | (1 << 20)  // TCINTEN: Transfer complete interrupt enable
   | (3 << 12)  // TCC: Transfer complete code
   | (1 << 11)  // TCCMODE: Transfer complete code mode
   | (0 << 8)  // FWID: FIFO Width. 目前设置为最小的8-bit
   | (0 << 3)  // STATIC: Static PaRAM set
   | (0 << 2)  // SYNCDIM: Transfer synchronization dimension
   | (0 << 1)  // DAM: Destination address mode
   | (0 << 0);  // SAM: Source address mode
   S2_SRC = demuxDma[row+2];
   S2_CNT = 0x00010000 | 352;
   S2_DST = demuxDma[row+3];
   S2_BIDX = 0x00000000;
   S2_LINK = 0x0001FFFF;
   S2_CIDX = 0x00000000;
   S2_CCNT = 0x00000001;

    At last, we trigger and wait for these two transfer complete:

    ESR = (1 << 3);
    //【Wait Transfer Completion】
    while((IPR & 0x00000008) != 0x00000008);       // Note: When running, program stop at this waiting
    ICR = 0x00000008;

    We checked that the PaRAM of channel 3 was updated with PaRAM set 2,

    but on data transfer and interrupt flag within IPR.

    Why? And if there are error in my code, please tell me haw to do it!

    Regards,

    Zhouger

  • So the Param set3 gets reloaded with Param set 2, but no transfer happens ? Not even the first transfer in Pset 3?
    That is weird.

    Some suggestions :

    Can you check  if EMR/SER registers are set ?

    What happens if in Param set 3, TCC to 3, instead of 0 and if you enable ITCINTEN ?

    Regards

     Varada

  • When we use QDMA channel, after LINK updated, the QDMA channel will be triggered antomatically.

    But when we use EDMA channel, after LINK updated, just the contents of this PaRAM set be updated, the transfer just be triggered when we set relative bit in SER again. Is this right?

    In other words, QDMA's LINK accompanyed with trigger, but EDMA's LINK does not accompany with trigger?

    Regards,

    Zhouger

  • Yes - QDMA is LINK triggered. Not for EDMA channels. When EDMA channel is linked - only Param Set is updated. Please refer section 2.4 of the user guide about different triggering techniques. You may consider using Chained transfers for EDMA channels, where completion of one transfer sets the event for the another channel(thats chained)

    Please let us know if you have further Qs.

    Regards

    Varada