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DM6435/DM6437 HPI boot

Are there items that I cannot update via HPI boot?  In particular, I am not sure I can change the PLL settings and bringing up the DDR2 with the HPI boot process.  The other startup code I have for the processor looks at various bits, has delays, powers modules up/down etc during startup.  Since the processor is actually suspended during HPI boot what, if anything, is offlimits?

I fear I will have to make a small program and run it out of processor memory to configure PLLs and DDR so that I can then load the real app into DDR via HPI.  I would really rather just write the configuration registers for PLL, and DDR via HPI and then load the application into DDR before releasing the processor.

 

Eric Bryan

 

  • Please take a look at the DM6437 Datasheet in Section 4 which describes the device interconnect.  Table 4-1 provides a description of the connection matrix between possible masters and slaves on the switched central resource.  It shows the HPI has access to the DDR2 Memory Controller.  Figure 4-1 provides an illustration to this device system interconnect.

    In addition, the TMS320DM643x DMP Host Port Interface (HPI) User's Guide (SPRU998) indicates what the HPI can access in Section 2.2.

  • I appologize for not being very specific.  I saw a couple items and they led to concerns that I generalized. I am probably making this more complicated than it needs to be.

    Two specific concerns:

    SPRU978E page 41 states: "The C64x+ DSP must be operational to program the PLL controller."  When in HPI boot mode the processor is hung waiting on BOOTCMPLT to be set.  Will this cause any problems?

     

    Step 5 on the same page can result in the clock for the HPI being paused.  Does this create any issues beyond needing a delay in reading/writing the HPI?

     

     

     

  • Eric Bryan said:
    SPRU978E page 41 states: "The C64x+ DSP must be operational to program the PLL controller."  When in HPI boot mode the processor is hung waiting on BOOTCMPLT to be set.  Will this cause any problems?

    At this point the DSP is 'operational.' The on-chip bootloader has already begun running and got the device ready for whichever boot mode you have selected. In the case of HPI boot it is just spinning in a loop watching for BOOTCMPLT. You should have no issues writing to PLL registers via the host processor as long as you follow the init steps in the PLL guide.

    Eric Bryan said:
    Step 5 on the same page can result in the clock for the HPI being paused.  Does this create any issues beyond needing a delay in reading/writing the HPI?
    I do not believe that this will cause issues with the HPI interface itself; however, you will definitely need to pause the host for at least as long as the PLL requires to lock onto the new frequency. You will probably want to allow some extra time just to make certain the PLL has settled. Aside from this you should not see issues with this.