This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

RTOS: Loading Vision SDK - >bsp-> vps application IPU1 image via kernel



Tool/software: TI-RTOS

Hi all,

We are using J6- DRA7XX- customized board.  

We are trying to load the vision-sdk (2.12) VPS loopback application image via kernel. Currently there is no support for loading this image via kernel in this application

Can you please support  for the same?

Regards

Gokul

  • Hi Gokul,

    I have forwarded your question to VisionSDK experts.

    Regards,
    Yordan
  • Gokul
    FYI, the entire VPS driver binaries are validated only in Bios context using SBL or CCS to load the binaries.
    There will be conflicts in memory map, cache configuration/MMU setting etc., while you try loading this image via kernel.
    You need to satisfy all these memory/MMU/cache requirements of VPS binary in Linux Kernel by leaving holes in the memory for IPU code/data sections.
    Can you help me to understand your requirement here?

    regards, Shiju
  • Hi Shiju,

    We have modified the dts file as explained in Earlyboot & late attach.

    Please find the dts in the attachment.

    ipu1_cma_pool: ipu1_cma@9d000000 {

       compatible = "shared-dma-pool";

       reg = <0x9d000000 0x2000000>;

       reusable;

       status = "okay";

    };

    IPU1 ipu1 timer11 timer7,timer8 mmu_ipu1

    Also We have set following attributes.

    ti,late-attach,ti,no-idle-on-init,ti,no-reset-on-init

    &ipu1 {

    status = "okay";

    memory-region = <&ipu1_cma_pool>;

    mboxes = <&mailbox5 &mbox_ipu1_ipc3x>;

    timers = <&timer11>;

    watchdog-timers = <&timer7>, <&timer8>;

    ti,late-attach;

        ti,no-idle-on-init;

        ti,no-reset-on-init;

    };

    We are in touch with Venkat.mandela from TI.

    While loading via kernel following  attributes are removed.( ti,late-attach,ti,no-idle-on-init,ti,no-reset-on-init )in dts.

    We need the support for loading the VPS loopback application image via kernel.

    Please list out all the files required to change.

    Currently i am doiing change in config_tda2xx.bld & new file (resource table) added.

    Regards,

    Gokul

    /*
     * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
     *
     * This program is free software; you can redistribute it and/or modify
     * it under the terms of the GNU General Public License version 2 as
     * published by the Free Software Foundation.
     */
    /dts-v1/;
    
    #include "dra74x.dtsi"
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/clk/ti-dra7-atl.h>
    #include <dt-bindings/input/input.h>
    #include <dt-bindings/emlinux/emlinux.h>
    
    / {
    	model = "MMT-2020 ADVANCED+ B0 Sample";
    	compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7";
    	chosen {
    		bootargs = "console=ttyO2,115200n8 earlyprintk debug loglevel=7 root=ubi0:APPFS rw ubi.mtd=2 rootfstype=ubifs init=/sbin/init \
             mem=112M@0x80000000 mem=881M@0x89000000 "; 
    		/* console=ttyO2,115200n8 earlyprintk debug loglevel=7 initcall_debug root=/dev/mmcblk0p2 rw rootfstype=ext4 rootwait mem=112M@0x80000000 mem=881M@0x89000000 drm.debug=0xff */
    	};
    
    	memory {
    		device_type = "memory";
    		reg = <0x0 0x80000000 0x0 0x40000000>; /* 1024 MB */
    	};
    
    	reserved_mem: reserved-memory {
    		#address-cells = <2>;
    		#size-cells = <2>;
    		ranges;
    
    		ipu2_cma_pool: ipu2_cma@95800000 {
    			compatible = "shared-dma-pool";
    			reg = <0x0 0x95800000 0x0 0x3800000>;
    			reusable;
    			status = "okay";
    		};
    
    		ipu1_cma_pool: ipu1_cma@9d000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x0 0x9d000000 0x0 0x2000000>;
    			reusable;
    			status = "okay";
    		};
    		
    		dsp1_cma_pool: dsp1_cma@99000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x0 0x99000000 0x0 0x4000000>;
    			reusable;
    			status = "okay";
    		};
    		
    		dsp2_cma_pool: dsp2_cma@9f000000 {
    			compatible = "shared-dma-pool";
    			reg = <0x0 0x9f000000 0x0 0x1000000>;
    			reusable;
    			status = "okay";
    		};
    		
    		/* Below memreserve is for Frame buffer data used by DSP2 */
    		rvc_pool2: rvc2@0xA0000000 {
    			reg = <0x0 0xA0000000 0x0 0x2000000>;			
    			status = "okay";
    		};
    		
    		latea_pagetbl: late_pgtbl@bfc00000 {
    			reg = <0x0 0xbfc00000 0x0 0x100000>;
    			no-map;
    			status = "okay";
    		};
    		
    	};
    
    	evm_3v3_sw: fixedregulator-evm_3v3_sw {
                   	compatible = "regulator-fixed";
                   	regulator-name = "evm_3v3_sw";
                   	regulator-min-microvolt = <3300000>;
                   	regulator-max-microvolt = <3300000>;
           	};
    
            aliases {
    		display0 = &fpd_disp1;
    		i2cSer = &disp_ser2;
            };
    
            dabplugin {
                    dab-irq-gpio = <0>;
                    dab-cs-gpio = <153>;
                    dab-cs-pinmux = <0x4A003664 0x6000E>;
            };
    
    	fpd_disp1: display {
    		status = "ok";
    		compatible = "omapdss,panel-dpi";
    		label = "fpd_disp1";
    
    		panel-timing {
    			clock-frequency = <25400000>;
    			hactive = <800>;
    			vactive = <480>;
    
    			hfront-porch = <32>;
    			hback-porch = <32>;
    			hsync-len = <2>;
    
    			vfront-porch = <5>;
    			vback-porch = <5>;
    			vsync-len = <2>;
    
    			hsync-active = <1>;
    			vsync-active = <1>;
    			de-active = <1>;
    			pixelclk-active = <1>;
    		};
    
    		port@lcd2 {
    			ser2_in: endpoint {
    				remote-endpoint = <&dpi_out2>;
    			};
    		};
    	};
    
    };
    
    
    &mmc1 {
            status = "okay";
            vmmc-supply = <&evm_3v3_sw>;
            bus-width = <4>;
    	cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
    };
    
    &mmc2 {
    	status = "okay";
    	vmmc-supply = <&evm_3v3_sw>;
    	bus-width = <4>;
    	pbias_setup;
    	ti,non-removable;
    };
    
    &mmc4 {
            status = "okay";
            vmmc-supply = <&evm_3v3_sw>;
            bus-width = <4>;
    	cd-gpios = <&gpio7 22 GPIO_ACTIVE_LOW>;
    };
    
    
    &dss {
    	status = "okay";
    
    	ports {
    		#address-cells = <1>;
    		#size-cells = <0>;
    		status = "okay";
    
    		/* LVDS OUT1 */
    		port@lcd2 {
    			reg = <1>;
    																							
    			dpi_out2: endpoint {
    				remote-endpoint = <&ser2_in>;
    				data-lines = <24>;
    			};
    		};
    	};
    };
    
    /*&i2c1 {
    	status = "okay";
    	clock-frequency = <100000>;
    };*/
    
    
    &i2c2 {
    	status = "okay";
    	clock-frequency = <400000>;
    
    	disp_ser2: serializer@0C {				
    		status = "ok";
    		compatible = "ti,ds90uh925q";
    		reg = <0x0C>;
    
    		#address-cells = <1>;
    		#size-cells = <0>;
    		ranges = <0x35 0x35>;
    
    		disp_des2: deserializer@35 {
    			compatible = "ti,ds90uh926q";
    			reg = <0x35>;
    			slave-mode;
    		};
    		
    	};
    };
    	
    &i2c3 {
    	status = "okay";
    	clock-frequency = <100000>;
    };
    
    &i2c4 {
           status = "okay";
           clock-frequency = <40000>;
    };
    
    /*&i2c5 {
           status = "okay";
           clock-frequency = <100000>;
    }; */
    
    
    /* DiRANA III */
    &mcspi1 {
           status = "okay";
            ti,pindir-d0-out-d1-in;
            spidev0: spidev@0 {
               compatible = "spidev";
               spi-max-frequency = <20000>;
               reg = <0>;
            };
    };
    
    /* IPC (J6 - IOC) */
    &mcspi2 {
           status = "okay";
            ti,pindir-d0-out-d1-in;
            spidev1: spidev@0 {
               compatible = "spidev";
               spi-max-frequency = <20000>;
               reg = <0>;
            };
    };
    
    /* DAB */
    &mcspi4 {
           status = "okay";
            ti,pindir-d0-out-d1-in;
    
    #if EMLINUX_KERNEL
    
            spidev3: spidev@0 {
               compatible = "spidev";
               spi-max-frequency = <20000>;
               reg = <0>;
    	};
    #else 
    
    /*
     * Child node of mcspi4 is removed as the platform data for spi0
     * node will now be populated from driver: dynamic_spi_node.ko
     * We aren't touching the child node in case of emlinux.
     */
        dab: dab@0 {
               compatible = "dabplugin";
               spi-cpha;
               spi-max-frequency = <4000000>;
               reg = <0>;
            }; 
    #endif
    
    };
    
    /*
    &uart1 {
    	status = "okay";
    	pinctrl-names = "default";
    };
    
    &uart2 {
    	status = "okay";
    }; */
    
    /* Debug UART */
    &uart3 {
    	status = "okay";
    };
    
    /* UART -IPC */
    &uart5 {
            status = "okay";
            pinctrl-names = "default";
    };
    
    /* GPS */
    &uart9 {
            status = "okay";
            pinctrl-names = "default";
    };
    
    /* BT/WLAN */
    &uart10 {
            status = "okay";
            pinctrl-names = "default";
    };
    
    
    &qspi {
    	status = "okay";
    
    	spi-max-frequency = <64000000>;
    	pinctrl-names = "default";
    
    	m25p80@0 {
    		compatible = "jedec,spi-nor";
    		spi-max-frequency = <64000000>;
    		reg = <0>;
    		spi-tx-bus-width = <1>;
    		spi-rx-bus-width = <1>;
    		spi-cpol;
    		spi-cpha;
    		#address-cells = <1>;
    		#size-cells = <1>;
    
    		/* MTD partition table.
    		 * The ROM checks the first four physical blocks
    		 * for a valid file to boot and the flash here is
    		 * 64KiB block size.
    		 */
    
    		partition@0 {
    			label = "QSPI.IPL";
    			reg = <0x00000000  0x00200000>;
    #if !(EMLINUX_KERNEL == 1)
    			read-only;
    #endif
    		};
    
                    partition@1 {
                            label = "QSPI.DSP";
                            reg = <0x00200000  0x00200000>;
                    };
    
                    partition@2 {
                            label = "QSPI.RESERVED";
                            reg = <0x00400000  0x00400000>;
                    };
    
    	};
    };
    
    
    &usb1 {
    	dr_mode = "host";
    };
    
    &usb2 {
    	dr_mode = "host";
    };
    
    &elm {
    	status = "okay";
    };
    
    &gpmc {
    	status = "okay";
    	ranges = <0 0 0x08000000 0x01000000>;	/* minimum GPMC partition = 16MB */
    	nand@0,0 {
    		compatible = "ti,omap2-nand";
    		reg = <0 0 4>;		/* device IO registers */
    		interrupt-parent = <&gpmc>;
    		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
    			     <1 IRQ_TYPE_NONE>; /* termcount */
    		rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 pin */
    		ti,nand-ecc-opt = "bch8";
    		ti,elm-id = <&elm>;
    		nand-bus-width = <16>;
    		gpmc,device-width = <2>;
    		gpmc,sync-clk-ps = <0>;
    		gpmc,cs-on-ns = <0>;
    		gpmc,cs-rd-off-ns = <80>;
    		gpmc,cs-wr-off-ns = <80>;
    		gpmc,adv-on-ns = <0>;
    		gpmc,adv-rd-off-ns = <60>;
    		gpmc,adv-wr-off-ns = <60>;
    		gpmc,we-on-ns = <10>;
    		gpmc,we-off-ns = <50>;
    		gpmc,oe-on-ns = <4>;
    		gpmc,oe-off-ns = <40>;
    		gpmc,access-ns = <40>;
    		gpmc,wr-access-ns = <80>;
    		gpmc,rd-cycle-ns = <80>;
    		gpmc,wr-cycle-ns = <80>;
    		gpmc,bus-turnaround-ns = <0>;
    		gpmc,cycle2cycle-delay-ns = <0>;
    		gpmc,clk-activation-ns = <0>;
    		gpmc,wr-data-mux-bus-ns = <0>;
    		/* MTD partition table */
    		/* All SPL-* partitions are sized to minimal length
    		 * which can be independently programmable. For
    		 * NAND flash this is equal to size of erase-block */
    		#address-cells = <1>;
    		#size-cells = <1>;
    		/*nand partition*/
    
                    partition@0 {
                            label = "FS";
                            reg = <0x000000000000 0x10000000>;
                    };
    
    	};
    };
    
    &gpio7 {
    	ti,no-reset-on-init;
    	ti,no-idle-on-init;
    };
    
    &gpio6 {
    	ti,no-reset-on-init;
    	ti,no-idle-on-init;
    };
    
    /* RMII Interface */
    &davinci_mdio {
            status = "okay";
    };
    
    &mac {
            status = "okay";
    };
    
    &cpsw_emac1 {
            phy_id = <&davinci_mdio>, <1>;
            phy-mode = "rmii";
            status = "okay";
    };
    
    
    
    &mcasp3 {
    	#sound-dai-cells = <0>;
    
    	assigned-clocks = <&mcasp3_ahclkx_mux>;
    	assigned-clock-parents = <&atl_clkin2_ck>;
    
    	status = "okay";
    
    	op-mode = <0>;          /* MCASP_IIS_MODE */
    	tdm-slots = <2>;
    	/* 4 serializer */
    	serial-dir = <  /* 0: INACTIVE, 1: TX, 2: RX */
    		1 2 0 0
    	>;
    	tx-num-evt = <32>;
    	rx-num-evt = <32>;
    };
    
    &mcasp8 {
    	/* not used for audio. only the AXR2 pin is used as GPIO */
    	status = "okay";
    };
    
    &mailbox5 {
    	status = "okay";
    	mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
    		status = "okay";
    	};
    	mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
    		status = "okay";
    	};
    };
    
    &mailbox6 {
    	status = "okay";
    	mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
    		status = "okay";
    	};
    	mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
    		status = "okay";
    	};
    };
    
    &mmu0_dsp1 {
    	status = "okay";
    };
    
    &mmu1_dsp1 {
    	status = "okay";
    };
    
    &mmu0_dsp2 {
    	status = "okay";
    };
    
    &mmu1_dsp2 {
    	status = "okay";
    };
    
    &mmu_ipu1 {
    	status = "okay";
        ti,late-attach;
        ti,no-idle-on-init;
        ti,no-reset-on-init;
    };
    
    &mmu_ipu2 {
    	status = "okay";
    };
    
    &ipu2 {
    	status = "okay";
    	memory-region = <&ipu2_cma_pool>;
    	mboxes = <&mailbox6 &mbox_ipu2_ipc3x>;
    	timers = <&timer3>;
    	watchdog-timers = <&timer4>, <&timer9>;
    };
    
    &ipu1 {
    	status = "okay";
    	memory-region = <&ipu1_cma_pool>;
    	mboxes = <&mailbox5 &mbox_ipu1_ipc3x>;
    	timers = <&timer11>;
    	watchdog-timers = <&timer7>, <&timer8>;
    	ti,late-attach;
        	ti,no-idle-on-init;
        	ti,no-reset-on-init;
    };
    
    &timer11 {
        ti,late-attach;
        ti,no-idle-on-init;
        ti,no-reset-on-init;
    };
    
    &timer7 {
        ti,late-attach;
        ti,no-idle-on-init;
        ti,no-reset-on-init;
    };
    
    &timer8 {
        ti,late-attach;
        ti,no-idle-on-init;
        ti,no-reset-on-init;
    };
    
    
    
    / {
    	ocmc_bootinfo {
    		compatible = "bootinfo_data";
    		ocmc_bootinfo,mem_phy_addr = <0x40360000>;
    		ocmc_bootinfo,mem_size = <64>;
    	};
    };
    

  • Hi Gokul
    Venkat is the right person to support on this
    Also copied Sivaraj who owns the VPS drivers for any further details

    regards, Shiju
  • Gokul & I had a WebEX discussion and fixed his build related issues

    regards, Shiju