CCS/AM5728: Profibus FDL layer

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Hi, sorry for my delayed reply, I was out of office travelling. About your question, no sure if you have already checked API doc inside: C:\TI\PRU-ICSS-Profibus_Master_01.00.01.00\protocols\profibus_master\docs. In API_Documentation.html you will see in "Related Pages" tab with an "Integration with FDL Firmware" link. Please take a look and let us know if that was the information that you are looking for.
Thank you,
Paula

Thank you for your answer.

Yes, I have already read this documentation, but I don't think it is up to date.

For example, the functions InitApplicationBlocks(), GetApplicationBlock(), FreeApplicationBlock(appl_blk * ptr) and ActivateApplicationBlock(appl_blk * ptr, struct _queue * q) seem not available in the library provided. Can I know where this functions are available? 

I need to understand how the FDL layer works. I have a lot of questions unanswered, for example :

- How to initialize an appl_blk ?

- How to insert an appl_blk to the request queue ?

- In which confirmation queue can I find the appl_blk requested ?

- How the memories' structures are packed (4 bytes by 4 bytes or continualy) ?

- What are the different queues' functionalities ? Then, what is the logic processed between all queues and appl_blks?

- In which register addresses can I see TReadReg and TWriteReg evolution ? I saw in the Sitara_TRM_Revised April 2017.pdf and PROFIBUS_MASTER_FDL_API.pdf documentations that TReadReg and TWriteReg are mapped in the RAM1 of PRUICSS local data memory. The ARM has the access to it through the PRUICSS global memory, but all values seem freezed at 0.

- What is the value of REQ_EMPTY (TWriteReg->Mode1RegisterRes) ?

Thank you,

Best regards

Hi,

Thank you for those informations, I will try this.

Best regards

While we are trying to understand how the firmware works, we fear it will take us too much time so here are more specific questions.

Basically our problem is the following : We want to use the Profibus of the am572x Sitara in the following way :
-Use only the FDL layer.
-The Sitara will act as master on the bus, but there may be several master on the bus :
=>The Sitara must be able to manage token rotation
=>The Sitara must be able to process SDN or SDA messages received from other masters
-The profibus function shall be integrated in our own operating system

The profibus architecture advertised by TI with a FDL firmware in the PRU-ICSS and the DP layers managed by the Arm core seems adapted to our needs.

We thought we could use TI PRU-ICSS Profibus master firmware provided :
1) We can use the firmware independently of the DP stack, In our own OS. Of course we assumed we would have to write the correct wrapper for the OS
2) That this firmware supports to manage token rotation
3) That this firmware manages to pass to the Arm cores data received from other by a SDN or SDA requests

Now that you have a better knowledge of the context, what else could you suggest tell us if our assumptions 1, 2 & 3 are correct and how the Profibus PRU-ICSS firmware can be interfaced?

By looking at the buffers and assembly we will eventually get those answers. However we do need quick answers, because if 1,2 or 3 proves false this means we need to develop or outsource a whole new Profibus Firmware in a very tight schedule.

Thank you,

Best Regards

Hi, let me confirm with our Profibus experts and come back to you soon.

thank you,

Paula

Hi, sorry for my delay reply. Some of our industrial developers are out of office this week. From TI's Profibus White Paper I see multimaster mode is supported. But anyhow, please give us few more days until I can get a confirmation.

thank you,

Paula

Hi,

Thank you for this answer, but do you know when you will have a confirmation ?

Best Regards

Hi, starting next week.

thank you,

Paula

Hi, unfortunately, I got the information our Profibus master doesn't support multi master mode (which includes token management). I will request the white paper to be corrected.

Thank you,

Paula

Hi, thank you for this information even if it is very disappointing. 

Is the am572x the only Sitara on which this feature is not available, or is this the case on all Sitara processors ?

Is there a technical limitation on the am572x PRU-ICSS that prevents this feature from working ?

How can TI help us get this feature working on the am572x ?

Regards