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Linux: J6 ENTRY DRA718 GPU DPLL CAN NOT LOCKED

SHENG HUANG
Prodigy 50 points

Tool/software: Linux

HI,

The J6 entry's GPU can do a good job, usually, but we found one board's GPU can not working.the linux kernel log had one line [clock:
dpll_gpu_ck failed transition to 'locked'].So, i got the register about gpu dpll, CM_IDLEST_DPLL_GPU=0x2 instead of 0x1f, so the gpu dpll can not locked.

because of the gpu dpll can not lock, the GPU GCLK = SYS_CLK1 = 20MHZ, but not 425MZH, the GPU render the four pictures about 2 FPS. it is to slow!

what we can do to avoid boards's gpu dpll not lock?

 

  • 0
    TI__Guru**** 170625 points
    Hi Sheng,

    Do you use PROCESSOR-SDK-LINUX-AUTOMOTIVE 03_03_00_03?

    software-dl.ti.com/.../index_FDS.html

    Regards,
    Pavel
  • 0
    TI__Guru**** 170625 points

    SHENG HUANG said:
    but we found one board's GPU can not working

    Do you mean you have just one not working out of many? If yes, then most probably this is HW malfunction of this board. You can start debugging with verifying the main osc requirements are according to the DRA71x DM. You can also check vdda_gpu power supply pin.

    Regards,
    Pavel

  • 0 in reply to Pavel Botev
    Prodigy 50 points
    of course, i had debug whit the HW,and the sys_clk1 is 20MHZ, vdda_gpu is 1.8V. But other dpll such as ddr, gmac and so on can work well! My question is what can we do to let gpu dpll work well, or the HW is bad and we can not do anything? I use PROCESSOR-SDK-LINUX-AUTOMOTIVE V3.2.0.3 version.
  • 0 in reply to SHENG HUANG
    TI__Genius 17750 points
    Hi Sheng,
    If I understood well, you have only one faulty board, correct?
    - You said you measured the vdda_gpu, but did you measure it most closely to the SoC? E.g. the closest capacitor or via, etc.
    - Even better idea is to measure cap_vddram_gpu pin (and the CAP) as that is the output of the GPU DPLL LDO. Though I don't know the exact values... But something between 1V and ~1.6 V should be a good start.
    - You can measure also the other GPU analog voltages.
    - At last, be aware that GPU_DPLL is not the only clock source for GPU, you can also use CORE or PER DPLL. They may not reach the optimal clock rates, but I think they can do the job if anything else fails.

    Regards,
    Stan
  • 0 in reply to SHENG HUANG
    TI__Guru**** 170625 points

    Sheng,

    SHENG HUANG said:
    My question is what can we do to let gpu dpll work well, or the HW is bad and we can not do anything?

    It is preferred to minimize the value for N parameter (it minimizes lock time and jitter). Then M should be chosen to provide correct frequency (with lowest delta as possible).

    You can also try to compensate possible HW issue with recalibration, see DRA71x TRM section 3.6.3.12.4 DPLL_GPU Recalibration

    If you still can not lock GPU DPLL, you can try using CORE_DPLL_HS_CLK (bypass clock) instead of GPU_DPLL_CLK (ref clock). See DRA71x TRM for more info on this.

    You can also compare DPLL_GPU registers values between working and non-working board and see if there will be any difference.

    Regarding HW issue debug, you can also check DRA71x DM, Table 5-25. DPLL Type A Characteristics and 5.9.4.3.3 DPLL and DLL Noise Isolation

    Regards,
    Pavel