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CCS/TDA3XEVM: .CMD Format

Alexander Norokh
Intellectual 995 points
Part Number: TDA3XEVM

Tool/software: Code Composer Studio

Dear colleagues,

Now we are estimating migrationg our video system to Jacinto TDA35XXABFQ1 chip (DM505M) and want to test performance.
We use Spectrum Digital Starter Kit 15x15 TDA3x ES1.0 GP (EVMTDA3G-01-40-00 01NOV16 703754-1101 REV A).
Software we work at: CCS7, PROCESSOR_SDK_VISION_03_00_00_00, starterware_01_06_00_16.
At first I would like to make system part of software, based upon 2 Cortex-M4 IPUs.

At this moment I want to study .cmd file format for memory section definitions for multiprocessor configuration: 2 Cortex + 2 DSPs + EVE + .... something else.Can anybody point out most relevant document about .cmd file creation?

Complete list of TI .cmd keywords.

It would be nice to see comments how this file syntax change during the time.

Best Regards
Alex Norokh

  • 0 in reply to Alex Bashkov
    Intellectual 995 points
    Yes! I read this document.
    There is no complete list of sections.
    I meet various sections in CMD files such ".my_sect_ddr", ".intc_text", ".plt", ".l2_int", ".pmIdleFunc" - secret sections?
    For what is this hidden sections?
    I tried to find complete linker guide, found only for MSP430.
    I need for C66x one.
  • 0 in reply to Alexander Norokh
    TI__Genius 13175 points

    Not sure there is such guide, all these seem like common linker language variables which are probably decided/named by whoever wrote that file.  The only variable that I could find explanation for is

     

    The DSP Application must create a section called “.pmIdleFunc” in the DSP L2
    RAM of size at least 0x80 bytes in order for the CPU IDLE function to be
    placed in the DSP L2 RAM. This is because XMC pre-fetches should be
    completed before the DSP CorePac can be powered down. If this section is not
    created and the DSP is CorePac is powered down, any ongoing XMC prefetches
    do not complete and the DSP might reach a possible core hang state.
    For more details, see the Errata ID: i898 in the Silicon Errata for TDA2x
    (SPRZ397) [9], TDA2ex (SPRZ428) [10] and TDA3x (SPRZ425) [11].

    Can't you just use a ready file and not worry about these? In general, you should just tweak the file...

    Thanks,

    Alex

  • 0 in reply to Alex Bashkov
    TI__Mastermind 30235 points
    Just to add. The ".my_sect_ddr", ".intc_text", ".plt", ".l2_int", ".pmIdleFunc" are user defined sections. The relevance of these is based on the starterware examples and common intialization code they are getting used in:

    For example as Alex rightly pointed out the pmIdleFunc is used for DSP L2 RAM WFI code.
    my_sect_ddr is a user defined section used in some of the ddr test, dma copy Starterware example applications.
    l2_int is used to hold the DSP Interrupt vector table.
    intc_text is used to hold the hard fault handler in Cortex M4.

    Searching for the section names in the code base will give you some ideas for what they are getting used.

    As a starting point however, I would suggest to go ahead with existing linker files. If you do not have these sections defined as a part of your code they will be empty and not be included in your application.

    The general command file keywords for C66x are present in www.ti.com/.../spru187u.pdf Linker sections.

    Thanks and Regards,
    Piyali