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NAND boot problem

VladimirJovanovic
Prodigy 130 points

 

I having NAND boot problem on board based on DM6437.

Booting works only if code is in IRAM. I use cfg when make AIS to set registers like GEL do, but  it seems DDR is not working correctly.

On EVM everything works fine.

 

Any ideas how to solve the problem?

  • 0
    Intellectual 480 points

    hi,

    Ｉalso have the problem.have you solved it?

    thanks a lot!!

  • 0 in reply to qbliu
    Prodigy 130 points

    Yes... first, cfg file wasn't correct...I find righ values for DDR settings. Second I use call to EVMDM6437_init() in main function to set registers like GEL did.

    So, now boot works on my boards.

    Regards

     

     

  • 0 in reply to VladimirJovanovic
    Intellectual 480 points

    Thanks for your reply!!

    Follow what you say, I change my .cfg as follows.Is it right?

    0x5853590D  #   Function Execute Command
    0x00030000  #   Selects PLL configuration function, with 3 arguments
    0x00000021  #   PLLM value 21 ==> 594MHz
    0x00000001  #   PLLDIV 1
    0x00000000  #   Clock source

    0x5853590D    #   Function Execute Command
    0x00050001    #   Selects EMIFA configuration, with 5 arguments
    0x00840328    #   AB1CR control register mask
    0x3FFFFFFC  #   AB2CR control register mask
    0x3FFFFFFC  #   AB3CR control register mask
    0x3FFFFFFC  #   AB4CR control register mask
    0x00000001    #   NANDFCR control register mask

    0x5853590D  #   Function Execute Command
    0x00090002   #   Selects DDR memory configuration, with 9 arguments
    0x00000023   #   DDR PLLM 23 ==> 648MHz
    0x00000001   #   DDR CLLK DIV 1 ==> 162MHz
    0x0000000B   #   VPSS CLK DIV 11 ==>54MHZ
    0x00000000   #   PLL SRC  0: Onchip Oscillator
    0x50006405   #   DDR Control register mask
    0x00138822   #   SDRAM Config register mask
    0x16492148   #   SDRAM Timer 0 register mask
    0x000CC702  #   SDRAM Timer 1 register mask
    0x000004EF  #   SDRAM Refresh control register mask

    I have another problem:

    I use flashburn flashing norflash. when i put some section(.data\.text...) into the ddr2,it

    did not run. but it run when all the sections were put into L2SAM.The NANDSecondaryBoot.doc say the code which initialize the pll and ddr2 have already been put into the .hex file~~ How do you say?

    Regards

  • 0 in reply to qbliu
    Prodigy 130 points

    xiansheng liu said:

    Thanks for your reply!!

    Follow what you say, I change my .cfg as follows.Is it right?

    0x5853590D  #   Function Execute Command
    0x00030000  #   Selects PLL configuration function, with 3 arguments
    0x00000021  #   PLLM value 21 ==> 594MHz

    ....
    0x00000023   #   DDR PLLM 23 ==> 648MHz

    I have another problem:

    I use flashburn flashing norflash. when i put some section(.data\.text...) into the ddr2,it

    did not run. but it run when all the sections were put into L2SAM.The NANDSecondaryBoot.doc say the code which initialize the pll and ddr2 have already been put into the .hex file~~ How do you say?

    Regards

     

    You didn't convert all values to hex (23->0x17   21 ->0x15).

    And I didn't work with nor flash...only NAND with direct boot.