Other Parts Discussed in Thread: SYSBIOS,
Tool/software: TI-RTOS
Hello,
I've got a few questions regarding the IPC memory map use in ex41_forwardmsg:
The devicetree specifies these address origins/sizes:
IPU1: 0x9580 0000 / 0x0380 0000 (56M)
DSP1: 0x9900 0000 / 0x0400 0000 (64M)
IPU1: 0x9D00 0000 / 0x0200 0000 (32M)
DSP2: 0x9F00 0000 / 0x0080 0000 (8M)
CMEM: 0xA000 0000 / 0x0C00 0000 (192M)
In the config.bld the following information is provided:
DSP1:
* Virtual Physical Size Comment
* ------------------------------------------------------------------------
* 9500_0000 ???0_0000 10_0000 ( ~1 MB) EXT_CODE
* 9510_0000 ???0_0000 10_0000 ( 1 MB) EXT_DATA
* 9520_0000 ???0_0000 30_0000 ( 3 MB) EXT_HEAP
* 9F00_0000 ???0_0000 6_0000 ( 384 kB) TRACE_BUF
* 9F06_0000 ???6_0000 1_0000 ( 64 kB) EXC_DATA
* 9F07_0000 ???7_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt)
* BFC0_0000 ???0_0000 10_0000 ( 1 MB) SR0 (Shared region)
IPU1:
* Virtual Physical Size Comment
* ------------------------------------------------------------------------
* 0000_4000 ???0_4000 F_C000 ( ~1 MB) EXT_CODE
* 8000_0000 ???0_0000 20_0000 ( 2 MB) EXT_DATA
* 8020_0000 ???0_0000 30_0000 ( 3 MB) EXT_HEAP
* 9F00_0000 ???0_0000 6_0000 ( 384 kB) TRACE_BUF
* 9F06_0000 ???6_0000 1_0000 ( 64 kB) EXC_DATA
* 9F07_0000 ???7_0000 2_0000 ( 128 kB) PM_DATA (Power mgmt)
* BFC0_0000 ???0_0000 10_0000 ( 1 MB) SR0 (Shared region)
(I added the Shared Region 0 info)
rsc_table_dsp1:
#define DSP_MEM_TEXT 0x95000000
#define DSP_MEM_IOBUFS 0x80000000
#define DSP_MEM_DATA 0x95100000
#define DSP_MEM_HEAP 0x95200000
#define DSP_SR0_VIRT 0xBFC00000
#define DSP_SR0 0xBFC00000
#define DSP_MEM_IPC_DATA 0x9F000000
#define DSP_MEM_IPC_VRING 0xA0000000
#define DSP_MEM_RPMSG_VRING0 0xA0000000
#define DSP_MEM_RPMSG_VRING1 0xA0004000
#define DSP_MEM_VRING_BUFS0 0xA0040000
#define DSP_MEM_VRING_BUFS1 0xA0080000
#define PHYS_MEM_IPC_VRING 0x99000000
rsc_table_ipu1:
#define IPU_MEM_TEXT 0x0
#define IPU_MEM_DATA 0x80000000
#define IPU_SR0_VIRT 0xBFC00000
#define IPU_SR0 0xBFC00000
#define IPU_MEM_IPC_DATA 0x9F000000
#define IPU_MEM_IPC_VRING 0x60000000
#define IPU_MEM_RPMSG_VRING0 0x60000000
#define IPU_MEM_RPMSG_VRING1 0x60004000
#define IPU_MEM_VRING_BUFS0 0x60040000
#define IPU_MEM_VRING_BUFS1 0x60080000
#define PHYS_MEM_IPC_VRING 0x9D000000
- Are the IPU/DSP addresses all remapped by the offset given in PHYS_MEM_IPC_VRING?
- The sections TRACE_BUF, EXC_DATA and PM_DATA are at large offsets beyond the carveout. To which physical addresses do they point?
- IPU_SR0 and DSP_SR0 are located at 0xBFC00000 (phys). This is inside the RAM but outside of any carveout. How does the Linux-side know that this area is used by the Shared Region 0?
The files I expect to modify to change the memory map are:
- linux device tree include file to specify cma origin and length, also cmem origin and length
- config.bld (linker info)
- ipc.cfg.xs (shared region config)
- rsc_table.h (address info; two versions, one for dsp one for ipu)
Did I miss something?
For our application I'd like to exchange messages between Linux/DSP/IPU.
- Is it safe to use one Shared Region by the IPU and the DSP at the same time to allocate memory (for a MessageQ message)?
- Do I need to setup a Shared Region to allocate memory for MessageQ messages or could I use apart of the CMEM area? (does CMEM implement IHeap?)
- Shared Regions are for Sysbios only, can I send messages allocated in a Shared Region to a Linux MessageQ?
I also would like to have a large memory block shared between Linux/DSP/IPU, for that I'd use a chunk of RAM reserved by CMEM. It this the recommended way?
Best regards,
Lo2