In my C6747 board , I want boot it with SPI0 flash. I failed.
I describe the question with attachment.
Could you help me?
Thank you so much!c6747boot_question.pdf
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In my C6747 board , I want boot it with SPI0 flash. I failed.
I describe the question with attachment.
Could you help me?
Thank you so much!c6747boot_question.pdf
Thanks for describing the details of your problem. Why do you think the boot failed ? You indicate in the document that the LED stays on even when you load the code over the emulator as well as when the application boot from flash.
If you suspect that this is a boo tissue then can you perform the following debug steps that will help isolate this issue.
* Run the debug GEL file provided here when the boot fails and attach the log
* Reduce to the SPI speed to 10 Mhz and retry the experiment.
Have you checked the GPIO register to determine that it is set and then unset to blink the LED. Is the timer count setup correctly? If not the LED could be blinking to quickly.
Regards,
Rahul
Thank you so much for your help.
And I did as your suggestion. I attach the result.
And I still has some question, shown with the attachment.
Thank you!c6747boot_question_v02.pdf
C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | Device Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: DEV_INFO_00 = 0x9B7DF02F C674X_0: GEL Output: DEV_INFO_01 = 0x00000000 C674X_0: GEL Output: DEV_INFO_02 = 0x0000F375 C674X_0: GEL Output: DEV_INFO_03 = 0x00000004 C674X_0: GEL Output: DEV_INFO_04 = 0x00000000 C674X_0: GEL Output: DEV_INFO_05 = 0x000003E0 C674X_0: GEL Output: DEV_INFO_06 = 0x00000200 C674X_0: GEL Output: DEV_INFO_07-DEV_INFO_08-DEV_INFO_09-DEV_INFO_10-DEV_INFO_11-DEV_INFO_12 = 8-0-172209-3-43-40 C674X_0: GEL Output: DEV_INFO_13,DEV_INFO_14,DEV_INFO_15,DEV_INFO_16 = 2,0,0,10475 C674X_0: GEL Output: ----- C674X_0: GEL Output: DEV_INFO_17 = 0x00030003 C674X_0: GEL Output: DEV_INFO_18 = 0x00000000 C674X_0: GEL Output: DEV_INFO_19 =C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: 0C674X_0: GEL Output: C674X_0: GEL Output: ----- C674X_0: GEL Output: DEV_INFO_20 = 0x30303864 C674X_0: GEL Output: DEV_INFO_21 = 0x3530306B C674X_0: GEL Output: DEV_INFO_22 = 0x00000000 C674X_0: GEL Output: DEV_INFO_23 = 0x00000000 C674X_0: GEL Output: ----- C674X_0: GEL Output: DEV_INFO_24 = 0x0302802B C674X_0: GEL Output: DEV_INFO_25 = 0x0802A0B1 C674X_0: GEL Output: DEV_INFO_06 = 0x00000200 C674X_0: GEL Output: DEV_INFO_26 = 0x51D60002 C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | BOOTROM Info | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: ROM ID: d800k005 C674X_0: GEL Output: Silicon Revision 3.0 C674X_0: GEL Output: Boot pins: 62325 C674X_0: GEL Output: Boot Mode: SPI0 Flash (0x0000F375) C674X_0: GEL Output: ROM Status Code: 0x00000000 Description:C674X_0: GEL Output: No error C674X_0: GEL Output: Program Counter (PC) = 0x00712144 C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | Clock Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: C674X_0: GEL Output: PLLs configured to utilize crystal. C674X_0: GEL Output: ASYNC3 = PLL0_SYSCLK2 C674X_0: GEL Output: C674X_0: GEL Output: NOTE: All clock frequencies in following PLL sections are based C674X_0: GEL Output: off OSCIN = 24 MHz. If that value does not match your hardware C674X_0: GEL Output: you should change the #define in the top of the gel file, save it, C674X_0: GEL Output: and then reload. C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | PLL0 Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: C674X_0: GEL Output: PLL0_SYSCLK1 = 300 MHz C674X_0: GEL Output: PLL0_SYSCLK2 = 150 MHz C674X_0: GEL Output: PLL0_SYSCLK3 = 100 MHz C674X_0: GEL Output: PLL0_SYSCLK4 = 75 MHz C674X_0: GEL Output: PLL0_SYSCLK5 = 50 MHz C674X_0: GEL Output: PLL0_SYSCLK6 = 300 MHz C674X_0: GEL Output: PLL0_SYSCLK7 = 37 MHz C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | PSC0 Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: C674X_0: GEL Output: State Decoder: C674X_0: GEL Output: 0 = SwRstDisable (reset asserted, clock off) C674X_0: GEL Output: 1 = SyncReset (reset assered, clock on) C674X_0: GEL Output: 2 = Disable (reset de-asserted, clock off) C674X_0: GEL Output: 3 = Enable (reset de-asserted, clock on) C674X_0: GEL Output: >3 = Transition in progress C674X_0: GEL Output: C674X_0: GEL Output: Module 0: EDMA3CC (0) STATE = 3 C674X_0: GEL Output: Module 1: EDMA3 TC0 STATE = 3 C674X_0: GEL Output: Module 2: EDMA3 TC1 STATE = 3 C674X_0: GEL Output: Module 3: EMIFA (BR7) STATE = 3 C674X_0: GEL Output: Module 4: SPI 0 STATE = 3 C674X_0: GEL Output: Module 5: MMC/SD 0 STATE = 3 C674X_0: GEL Output: Module 6: AINTC STATE = 3 C674X_0: GEL Output: Module 7: ARM RAM/ROM STATE = 3 C674X_0: GEL Output: Module 9: UART 0 STATE = 3 C674X_0: GEL Output: Module 10: SCR 0 (BR0/1/2/8) STATE = 3 C674X_0: GEL Output: Module 11: SCR 1 (BR4) STATE = 3 C674X_0: GEL Output: Module 12: SCR 2 (BR3/5/6) STATE = 3 C674X_0: GEL Output: Module 13: PRUSS STATE = 3 C674X_0: GEL Output: Module 14: ARM STATE = 0 C674X_0: GEL Output: Module 15: DSP STATE = 3 C674X_0: GEL Output: C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: | PSC1 Information | C674X_0: GEL Output: --------------------------------------------- C674X_0: GEL Output: C674X_0: GEL Output: State Decoder: C674X_0: GEL Output: 0 = SwRstDisable (reset asserted, clock off) C674X_0: GEL Output: 1 = SyncReset (reset assered, clock on) C674X_0: GEL Output: 2 = Disable (reset de-asserted, clock off) C674X_0: GEL Output: 3 = Enable (reset de-asserted, clock on) C674X_0: GEL Output: >3 = Transition in progress C674X_0: GEL Output: C674X_0: GEL Output: Module 1: USB0 (2.0) STATE = 3 C674X_0: GEL Output: Module 2: USB1 (1.1) STATE = 3 C674X_0: GEL Output: Module 3: GPIO STATE = 3 C674X_0: GEL Output: Module 4: UHPI STATE = 3 C674X_0: GEL Output: Module 5: EMAC STATE = 3 C674X_0: GEL Output: Module 6: EMIFB (BR20) STATE = 3 C674X_0: GEL Output: Module 7: MCASP0 + FIFO STATE = 3 C674X_0: GEL Output: Module 8: MCASP1 + FIFO STATE = 3 C674X_0: GEL Output: Module 9: MCASP2 + FIFO STATE = 3 C674X_0: GEL Output: Module 10: SPI 1 STATE = 3 C674X_0: GEL Output: Module 11: I2C 1 STATE = 3 C674X_0: GEL Output: Module 12: UART 1 STATE = 3 C674X_0: GEL Output: Module 13: UART 2 STATE = 3 C674X_0: GEL Output: Module 16: LCDC STATE = 3 C674X_0: GEL Output: Module 17: eHRPWM (all) STATE = 3 C674X_0: GEL Output: Module 20: eCAP (all) STATE = 3 C674X_0: GEL Output: Module 21: eQEP 0/1 STATE = 3 C674X_0: GEL Output: Module 24: SCR8 (Br15) STATE = 3 C674X_0: GEL Output: Module 25: SCR7 (Br12) STATE = 3 C674X_0: GEL Output: Module 26: SCR12 (Br18) STATE = 3 C674X_0: GEL Output: Module 31: L3 RAM (Br13) STATE = 3
Rahul Prabhu said:did you try the experiment of slowing down the SPI clock to 10MHz.
Yes, I changed the SPI0 CLK to be 10MHz in AISgen. But I set the SPI1 CLK 1MHz in my LED application. May the SPI1 clk affect the SPI0 flash boot?
What a pitty, the TI evaluation platform of C6747 is not on my hand.
Rahul Prabhu said:Have you put a scope on the SPI clk to see if the clock and data transfer starts from flash ?
I put the scope on tge SPI0 clk, and there is no SPI0 CLK is output. What may be the reason?
I did not find the codes for SPI0 register settings in spiflash_writer_dsp projection.
Where is the SPI0 clk frequency set, is it set in AISgen?
Thank you so much!