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PRU Reset on OMAL138

Hello,

I just developed a pru bootloader and have one question about the SOFTRESET bit in the pru CONTROL register. It is mentioned that this bit is set back to 1 on the next cycle after it has been cleared. After having set this bit to 0 from arm side do i have to wait until the pru has set it back to 1 before setting the ENABLE bit to 1? Or am i allowed to set the ENABLE bit immediately to 1 in the next write sequence without taking care of SOFTRESET status?

http://processors.wiki.ti.com/index.php/Programmable_Realtime_Unit

Thanks Marc