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AM4384: LPDDR2 issues

Part Number: AM4384


Hi,

a custiomer is trying to get the EMIF working for their custom AM4384 board.

Memory used is a Micron B2432B4MA-1DIT-F 256Mb LPDDR2-533, notable differences to the EVM is the use of a 24MHz main crystal. The board is booting fine into u-boot-spl (modified u-boot-2017.01+gitAUTOINC+53133404c8-g53133404c8, same unmodified source works on EVM), but memory access is corrupt in a strange pattern. 

As the CPU crashes immediately after accessing the wrongly configured DRAM, we write a pattern `void board_init_f(ulong dummy)` in and abort the boot immediately afterwards. Validation / interpretation of the pattern is then manually done through JTAG. The values itself are OK (eg, we reliably read whatever value written), but it seems the data is shifted (either during read or write) within its burst group. 

The displacement pattern looks like this:

Target addr   Offset      Readback addr

0x0                0x20        0x20

0x4                0x20        0x24

0x8                0x10        0x18

0xC                0x10        0x1C

0x10               0             0x10  

0x14               0             0x14

0x18               -0x10      0x8

0x1C              -0x10       0xC

0x20               0x20        0x40


On the Clock side we do not suspect issues, as one of the DQS lines showed a clear and stable 266MHz signal.

Can you help us out with finding our issue?

Attached are the following files (not in this thread though):
* u-boot_sumup-solo.diff: diff between u-boot-2017.01+gitAUTOINC+53133404c8-g53133404c8 and our modified version
* EMIF-regs.txt: Register dump of all EMIF regs
* memdump.txt: Memdump of pattern that is observed through JTAG
* AM43xx_DDR_register_calc_tool_sumup.xls: XLS file used to calculate modified EMIF registers

Thanks

Fred