Linux/TMS320DM8148: Cold temperature

Hi Umberto,

I know this is HW issue, but can you try the SW approach described in the below e2e post? Please share the result.

e2e.ti.com/.../426001

Make sure also you are using external 100MHz differential clock source (serdes_clkp/n) pins to supply the PCIe and its embedded PLL, PCIE_PLLCFG0[31] SEL_IN_FREQ = 0

Regards,
Pavel

Hi,

about your suggestions, see below the comments:

- e2e.ti.com/.../426001

Testing a module that is not working at cold with suggested modification and connecting to the debugger(after the systems stopped)to read register status, we can see that boot is blocked with value:
PCIE_PLLSTATUS  0000E004
and could be unblocked with:
PCIE_PLLSTATUS  0000E8CD
 

From the HW point of view:

 

You can observe the PCIe PLL clock on the clkout0/1 pins, to compare between working and non-working board:

CLKOUT_MUX[19:16] CLKOUT1_MUX = 0x2 - Source is PCIe SERDES OBS CLK
CLKOUT_MUX[3:0] CLKOUT0_MUX = 0x2 - Source is PCIe SERDES OBS CLK

Clkout pins are set as in a working module,but no ck is generated when PCIe SERDES is set.

SATA and other clocks are instead correct.

See also DM814xx Silicon errata, Advisory 3.0.71 ROMCODE: PCIe Boot is Unstable

PCIe Boot is not used
 

You can also try with the PCIe diagnostic SW. This CCS test application validates the PCIE on the board for its ability to transfer and receive data. The test code is in PG2.1_DM814X_20Mhz_Si.gel
www.mistralsolutions.com/pes-support/support-downloads/tmdxevm8148.html#

 We are also starting to do this test.

Check VDDA_PCIE_1P8 supply pin has stable 1.8V

This voltage is ok.

Check SERDES_CLKP and SERDES CLKN clock pins has stable 100MHz, you can export to CLKOUT0/1 pins and measure with scope

100MHz clock signal is present with hot and working unit   as in " SERDES check.png"
With the unit cooled down to 0°C, 100Mhz clock disappears(" SERDES check cold.png").
The clock is not present until the temperature increases, independently  from boot is  happening correctly or not.
If block is happening and systems continues booting  (exiting from while), the clock is appearing again.
But the clock is not exactly 100MHz.
The board is a plug-in module and if it is run alone, clock workds correctly at 100MH as in "SERDES_check_nomodule.png" (not being terminated , there is some unbalance between + and -).

Make sure you are aligned with the below PCIe requirements:

DM814x datasheet, sections 7.4.2 SERDES_CLKN/P Input Clock, 8.17.2 PCIe Electrical Data/Timing and 8.17.3 PCIe Design and Layout Guidelines

7.4.2 SERDES_CLKN/P Input Clock

• CK generator is not close to the microprocessor and goes thru a connector

• Clock is coupled in AC correctly

8.17.2 PCIe
 We are compliant.

8.17.3 PCIe
As above, but due to the connector clock signal quality is degraded , but the bus is working propoerly
 
 

Regarding thermal management, refer to the below pointers:

www.ti.com/.../spra953c.pdf

processors.wiki.ti.com/.../AM335x_Thermal_Considerations
processors.wiki.ti.com/.../DM814x_AM387x_Power_Estimation

Umberto Frangi said:

Check SERDES_CLKP and SERDES CLKN clock pins has stable 100MHz, you can export to CLKOUT0/1 pins and measure with scope

100MHz clock signal is present with hot and working unit   as in " SERDES check.png"
With the unit cooled down to 0°C, 100Mhz clock disappears(" SERDES check cold.png").
The clock is not present until the temperature increases, independently  from boot is  happening correctly or not.

I think this is the root cause. You should investigate why on cold temperature SERDES_CLKP/N differential pins do not work properly.

Regards,
Pavel

Pavel,

 from the above description, I understand that CLKOUT are not generated at cold and then also  SERDES_CLK is not  present when PCI is set.

Thanks

Umberto

Hi Pavel,

 do you have any answer?

Thanks

Umberto

Hi Umberto,

Answer about what? I do not see any pending question in your previous reply. I go through the e2e thread again, and all your questions are answered.

Regards,
Pavel

Pavel,

 the questions are:

--if CLKOUT is not generated at cold(which is what I understood from customer description), can SERDES clock be generated when PCI is set?

-and if this is the case, what is the possible reason, quality issue or any application constraint?

Thanks

Umberto

Umberto,

Umberto Frangi said:

--if CLKOUT is not generated at cold(which is what I understood from customer description), can SERDES clock be generated when PCI is set?

CLKOUT is not generated, because there are probably no clock signals on the SERDES pins. You should check with the scope on the SERDES pins, AF1 and AF2. If the 100MHz differential clock stops at cold temperature, the problem probably is in the CDCM61002RHB chip, which is stopping to deliver this 100Mhz clock to the DM814x SERDES pins (AF1 and AF2). It is also good (if possible) to measure with scope the CDCM61002RHB chip 100Mhz output pins.

To sum up, check the 100Mhz signal with scope from both sides (DM814x input and CDCM61002RHB output).

If the problem is in the CDCM61002RHB chip, then you should ask/post in the below forum:

External 100MHz SERDES clock is a must for the DM814x PCIe, you can use internal clock only for SATA, but not for PCIe.

Regards,
Pavel