Part Number: TMDSEVM572X
Other Parts Discussed in Thread: TPS659037, TMDXIDK5718
This question is in reference to the TI_AM572XEVM_REV_A3a.PrjPcb schematic. I am removing the power on/off switch (S1) using the design notes here: https://e2e.ti.com/support/applications/automotive/w/design_notes/3266.should-i-use-powerhold-or-pwron-to-turn-on-the-pmic,
Quoting from the design note, "A second option is to tie POWERHOLD high permanently (eg. to LDOVRTC_OUT), and connect a powergood or supervisor reset to RESET_OUT. Either of these configurations allow the system to turn on when power is supplied, and will disable the PMIC before power is lost to ensure the processor's power-down sequence is still met."
I deleted the switch and left PWRON (ball G8) unconeected. POWERHOLD is tied to LDOVRTC_OUT; my question is about connecting a powergood or supervisor reset to RESET_OUT. On the rev A3a schematic, PMIC_RESET_OUT is already connected to a NOR gate on page 8, of which the output signal RTSOUTn is tied to the eMMC on page 18. Is this already sufficient to trigger the proper power down sequence when power is removed from the board?
