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Linux/AM3352: eCAP minimum PWM frequency

Renga samy
Prodigy 80 points
Part Number: AM3352


Tool/software: Linux

Hi All,

          we have made a customised board with AM3352. We required to generate 50Hz clock form the PWM module. we are using ECAP0_IN_PWM0_OUT as PWM. We can able to achieve 25%, 50% and 75% duty cycle generation. But the Frequency range Supported minimum is 1.5KHz by following the bellow link.

https://e2e.ti.com/support/arm/sitara_arm/f/791/p/557045/2040522

How to generate 50Hz Frequency using  ECAP0_IN_PWM0_OUT.

Regards,

Avinash N

  • 0
    TI__Guru**** 393215 points
    Hi,

    The PWMSS functional clock is 100MHz, and the CAP3 (APRD) register used for defining the PWM period is 32-bit. A value of 2000000 decimal should give you a 50Hz period.
  • 0 in reply to Biser Gatchev-XID
    Prodigy 80 points
    Hi,

    We have configured as mentioned above. But Still we cant able to achieve 50 Hz.
    The Values filled in the register are,

    #Enable block
    md.l 0x44E000D4 1
    mw.l 0x44E000D4 0x2


    #Configure C18 as eCAP0_in_PWM0_out
    md.l 0x44E10964 1
    mw.l 0x44E10964 0x00

    #Enable ePWM0 clk
    md.w 0x44E10664 1
    mw.w 0x44E10664 0x1

    #Check clock status (Is PWMSS_CLKCONFIG_REG = 0x101?)
    md.w 0x4830000C 1

    #Configure ECCTL2
    md.w 0x4830012A 1
    mw.w 0x4830012A 0x0280

    #Writing CAP1-3
    mw.l 0x48300108 2000000
    mw.l 0x48300110 2000000

    #Writing CAP2-4
    mw.l 0x4830010C 0x5F5
    mw.l 0x48300114 0x5F5

    #Configure CTRPHS
    md.l 0x48300104 1
    mw.l 0x48300104 0x0

    #Setting ECCTRL to Run
    md.w 0x4830012A 1
    mw.w 048300012A 0x0290


    any modification has to be done in the above register access.

    Regards,
    Avinash N
  • 0 in reply to Renga samy
    TI__Guru**** 393215 points
    Do you see any output on the device pin?