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RTOS/TMS320C6678: Ethernet Not working without soft reset from SW application

Part Number: TMS320C6678

Tool/software: TI-RTOS

Hi, 

In one of our project, we are using C6678 DSP.

But in our DSP, out of two SGMII ports (SGMII_0 and SGMII_1), SGMII_0 is connected as default in hardware.But later we faced issue with SGMII_0 that Link was not coming up.

But we got some input from forum saying that C6678 DSP only supporting SGMII_1 by default and we modified NIMU to support both SGMIII ports. Then it started working. The above all tests are by loading image through CCS after giving system_reset. and GEL file used is default one provided by TI. But once we flashed the same image, SW was hanging where SW was checking for PLL Lock status of SGMII.

for ref added code below.

do
{
CSL_SGMII_getStatus(0, &sgmii_status);
} while (sgmii_status.bIsLocked != 1);

But later we added soft reset in application and started working.

so i would like to know,

1.Does this issue was caused by SGMII port connection made on our board? (connecting SGMII_0 as default instead SGMII_1 port)

2.Are we missing any reset in CPLD reset sequence.?

  • Hi,

    I've notified the RTOS team. Their feedback will be posted directly here.

    Please post the SDK version and the CCS version you're using.

    Best Regards,
    Yordan
  • Hi,

    "Forum saying that C6678 DSP only supporting SGMII_1 by default" ====> That is because we only have SGMII 1 connected out via RJ-45 on TI EVM, the SGMII-0 can be accessed by AMC.

    In your board, what is the difference in SGMII 0 and SGMII 1 connection, are they both connected to PHY or MAC? In software, what is the auto-negotiation setting, link master and slave setting?

    Where you flash the image, NAND, NOR, I2C? What is the boot mode? If you remove the SGMII 0 code, will the  CSL_SGMII_getStatus(1, &sgmii_status) stuck? I am trying to understand if the stuck is because of different usage (CCS/GEL or certain boot mode) or different ports (SGMII 0 or 1)?

    Regards, Eric

  • CCS version 5 and SDK 2_01_02_05.

  • "In your board, what is the difference in SGMII 0 and SGMII 1 connection, are they both connected to PHY or MAC? In software, what is the auto-negotiation setting, link master and slave setting?"
    1. We have only one SGMII port (SGMII_0) and is connected to PHY
    2. Auto neg is enabled in software
    3. Link Master setting : default setup given by TI example code
    4. Link slave settings : default setup given by TI example code
    Where you flash the image, NAND, NOR, I2C? What is the boot mode?
    --- NOR FLASH and using i2c boot mode
    If you remove the SGMII 0 code, will the CSL_SGMII_getStatus(1, &sgmii_status) stuck?
    -- i think yes. we will revert back after testing again.
    We are using the GEL provided by the TI without any change. same has been implemented in SW also.