Tool/software: TI-RTOS
Hello
Could you help comment / answer the following concerns from a customer who has a project in the Avionics industry.
- HW – need to pass through errata, we’ve noticed during board development the issue with DDR memory – i922, http://www.ti.com/lit/er/sprz429k/sprz429k.pdf, page 101
- L2 memory size – 288kB
- Clock speed – based on datasheet, the nominal clocks are 1000GHz for Arm and 600 MHz for DSP. Increased voltage decrease life, http://www.ti.com/lit/ds/symlink/am5728.pdf, page 158 (Note: Customer would prefer 750MHz DSP)
- SW RTOS issues on EVM board – Unfortunately, the EVM is not good solution, because it is primarily targeted to show Sitara capabilities with Linux and LCD display. This leads to limitations in peripherals and availability of interfaces. For our purposes, we need two dedicated interfaces for sample exchange between Sitara and RF FE, but due to configuration we must use SPI 3 and SPI4. Observed issues:
- Too many abstraction layers between RTOS and HW http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_Software_Stack
- No straightforward way to use LLD and scheduler component from TI RTOS only
- SPI LLD drivers does not support all modes on all interfaces – there are no DMA channels available for SPI3 and SPI4 (need to check latest status/version). Difficult configuration of DMA cross connect.
- SPI slave mode not fully supported
- Scripted builds of RTOS (XDC tools) lead to dead code included
- Multi platform/multi device support of RTOS – lot of conditional compilation combined with scripts provide mess
- SW RTOS on IDK – better supprot from RTOS side, but not suitable for current project prototype. Can be used for PRUSS evaluation, but from examples seems that RTOS/Linux is required http://processors.wiki.ti.com/index.php/PRU-ICSS_Ethernet (not evaluated)
- Bare metal – currently we don’t have way to use LLD only and scheduler from RTOS
Many Thanks
Bob Bacon