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66AK2H14: Bootmode supported in EVB's RTOS

Madhu Sharma
Expert 2915 points
Part Number: 66AK2H14

Hi,

I am planning to boot 66AK2H14 SOC using NAND flash connected to EMIF interface, in one custom board.

For bootmode selection, I have provided switches for GPIO-01 to GPIO13 and CORESEL0, CORESEL1 & CORESEL2 pins so that these
pins can be set to either 1 or 0 at any time. But for GPIO-0 ( LENDIAN), GPIO14 ( MAINPLLODSEL), GPIO16 ( DDR3A_REMAP_EN)
and GPIO15 ( BOOTMODE_RSVD), I have not provided switch option and fixed these values to 0000. Please let me know whether
this setting is supported in evaluation module RTOS source code, for NAND flash booting.

Thanks & Regards,

Madhu

  • 0
    TI__Guru 65405 points
    I've forwarded your query to the TI-RTOS software experts. Their feedback should be posted here.

    BR
    Tsvetolin Shulev
  • 0
    TI__Guru** 116170 points
    Let us separate the support for the boot mode on the silicon with support for this boot mode in the RTOS software.

    The K2H silicon is concerned as mentioned in the DEVSTAT register spec in the datasheet, we support booting from NAND and this boot mode is supported in Linux SDK as well as bare-metal code for reference :
    processors.wiki.ti.com/.../KeystoneII_Boot_Examples

    As far as Processor SDK RTOS software is concerned, the boot mode support is limited to SPI boot mode:
    processors.wiki.ti.com/.../L

    The RTOS bootloader is a 2 stage boot with the RBL first loading in the user level secondary bootloader which eventually sets up the DDR and wakes up the slave cores and deploys the application. This has not been ported to NAND boot mode but the SPI can be used as reference to extend the functionality to EMIF16 NAND.

    Hope this helps

    Regards,
    Rahul