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RTOS/AM3352: RMII communication issue

Part Number: AM3352

Tool/software: TI-RTOS

Hi Team, 

We met one software issue with a RMII design on customers' board. Please help to check as below. 

Would appreciate for any comment or clues!

Hardware platform:

Customers’ product board with RMII design.

This design can work with the Linux, refer to below screenshot. So there is no problem with the hardware design.

Software platform:

PRCESSOR-SDK-RTOS 1.0.7 & 1.0.8.

Tested on both.

Based on the example:

NIMU_BasicExample_skAM335x_armExampleproject

C:\ti\pdk_am335x_1_0_7\packages\MyExampleProjects\NIMU_BasicExample_skAM335x_armExampleproject

Issue description:

When running on the SK EVM, the link status could be detected if the net cable plug out and in.  And from the PC host side, we can succeed in ping operation with the board.

After made the related code changes, the link status can be detected, but from host side it cannot ping successfully.

Code change:

main_skAM335x.c (located in C:\ti\pdk_am335x_1_0_7\packages\ti\transport\ndk\nimu\example\src\)

Change the RGMII mode to the RMII mode:

 

am335x_evmsk_pinmux_data.c (located in C:\ti\pdk_am335x_1_0_7\packages\ti\starterware\board\am335x)

Change the pinmux data from the original RGMII pins to the RMII pins that used by current hardware design.

enet_phy.c (located in C:\ti\pdk_am335x_1_0_7\packages\ti\board\src\skAM335x\device)

Change the _cpswIsGigPhy definition from TRUE to FLASE, as this is not the gigabit Ethernet.  

emac_soc.c (located in C:\ti\pdk_am335x_1_0_7\packages\ti\drv\emac\soc\am335x\)

This is where the Ethernet phy_id parameter located. As Customers’ design use 0 for EMAC1 and 1 for EMAC2, the same value that used for SK EVM. So there is no change required.

Compiling process:

As there’s some change in the board_lib, emac, we had to recompile the board_lib and emac first, then go to the CCS project NIMU_BasicExample_skAM335x_armExampleproject for the final compile.

Test result:

In this test, we plug in and out the net cable 3 times, so you could see the connection established 3 times as below:

However, from the PC host side, we cannot succeed in ping operation with the board.

Verifying process:

We checked the register for pinmux and gmii_sel settings, it turned out that all the settings took effect.

By comparing with the register dump from the Linux uboot, the pinmux settings for each pins and the gmii_sel registers are all shown the correct values.

In addition, we also did some test to verify the phy_id settings, if phy_id is changed to other value other than 0 for EMAC1 port, it would report below issue:

So from my perspective, the gmii_sel, pinmux settings, phy_id are all correct.

Questions:

What else could lead to the failure of the PC host ping with the product board?

  • The RTOS team have been notified. They will respond here.
  • Steven,

    Which PHY (TLK/DP83x or other) is used on board?
    Can you dump the MAC address using the function CpswEmacAddrGet() from cpsw_nimu_eth.c? The mac address should not be any multi-cast address.
    Also have you compared the PHY and CPSW stats registers between Linux and RTOS? What's the value of RCSR 0x0017 PHY register?

    Regards,
    Garrett
  • Garrett,

    I use the LAN8720 phy, CpswEmacAddrGet () to get the correct mac, the same as under linux.
    As PHY and CPSW stats registers between Linux and RTOS and RCSR 0x0017 PHY register I'm still looking.
  • Garrett,

    the value of RCSR 0x0017 PHY register specific address is how much I did not find.
  • Rong,

    Please ignore the 0x17 register which is applicable to TLK/DP83x PHY only.
    Also it should be helpful if you compare the following emac call flow between your board and starter kit.

    CpswEmacInit( ) in nimu/cpsw_nimu_eth.c

    Nimu_start( ) in nimu/cpsw_nimu_eth.c
    --->Emac_open( ) in emac_drv.c
         -->EMAC_open_v4( ) in emac_drv_v4.c
                       ------->EMAC_setupCpswInitConfig( )
                       ------->EMAC_interruptInit( )
              -->EMAC_cpswOpen( ) in emac_cpsw.c

    Regards,
    Garrett

  • Garrett


    When reading the code, I have a few places that I can not understand:


    In "board \ src \ skam335x \ device \ Enet_pht.h"

    #define ENETPHY_CNTRL_REG 0x0019 And #define ENETPHY_CONFIG_REG 22

    The specific role of the two macros, can do something about it, around the macro to do the settings, specifically what role played 

    Because I did not find the corresponding settings under linux uboot, I want to understand the role here
  • Rong,

    The two PHY registers for cable diagnostic test control and MDI pair select ( ENETPHY_CONFIG_REG 22, 0x16), and LED control ( ENETPHY_CNTRL_REG 0x19) respectively. Please refer to PHY AR8031 (on skam335x) for details. These two registers are not applicable to your PHY LAN8720.

    Regards,
    Garrett