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OMAPL138 Booting from NOR Flash

Marc48067
Expert 2000 points
Other Parts Discussed in Thread: OMAPL138

Hi,

we have some problems booting the OMAPL138 from nor flash. We want to execute our test code directly out of the nor flash. The code is written to flash at address 0x60000004 (no ais image). When setting the pc to this address with the debugger, we can debug the code and everything works fine. But the on chip loader doesn't branch to this address. So we are not able to start our test code out of the flash when powering up our board.

Things to know:

BOOTCFG Register (address 0x1C14020): 0x00000002 -> NOR Boot

First word in flash (address 0x60000000):  0x......11 -> direct NOR boot, 16Bit flash access

ARM ROM content (address 0xFFFD0000):

 

 Any ideas???

Regards

 Marc

 

  • 0
    Expert 2000 points

    I stepped through the first level loader in arm rom and saw that it writes the error code 0x00000200 at the address 0xFFFF0700 and ends up in an endless loop. What does this error code mean??

  • 0 in reply to Marc48067
    TI__Mastermind 27585 points

    Marc, you can use the debug GEL file to figure out what might be going wrong during the boot:

    http://processors.wiki.ti.com/index.php/OMAP-L1x_Debug_Gel_Files

    Can you print out the output after you connect?

    Jeff

  • 0 in reply to jc-ti
    TI__Mastermind 27585 points

    Also are you using the Logic PD EVM or a custom board?

    You can try flashing the NOR boot image found on the following page to see if it gets loaded correctly or not:

    http://processors.wiki.ti.com/index.php/Boot_Images_for_OMAP-L138

    Jeff

  • 0 in reply to jc-ti
    Expert 2000 points

    Hi Jeff,

    we are using our own OMAPL138 board. When I try to connect to the arm core with the XDS510 debugger in order to execute the gel script you told me, there is an error message which says "ARM9_0: GEL: Error while executing OnTargetConnect(): Could not read memory at 0xFFFD000C: Execution state prevented access.". I can connect to the dsp without any problems. When I put the arm core out of reset in HOST0CFG register and enable it in PSC via a gel script in the dsp, I am able to connect to the arm core. Is it necessary to enable  the arm manually??? On the evm board we can directly connect to the arm without connecting the dsp first. When I execute the gel script on the arm it says:

    RM9_0: Output: ---------------------------------------------

    ARM9_0: Output: | BOOTROM Info |

    ARM9_0: Output: ---------------------------------------------

    ARM9_0: Output: ROM ID: d800k004

    ARM9_0: Output: Silicon Revision 1.1

    ARM9_0: Output: Boot Mode: NOR

    ARM9_0: Output: ROM Status Code: 0x0000008E Description:

    ARM9_0: Output: Function not allowed

    ARM9_0: Output: Program Counter (PC) = 0xFFFF0000

    The Error Status Code looks strange. When I set the pc directly to ARM ROM and step through the level 1 bootloader code, it writes ROM Status Code 2 into the ARM RAM which means Unknown Error. Any Idea?

    What happens on dsp side? Is there also a loader which enables the arm so that it can execute its own loader? Which cpu is enabled first?

    Regards

    Marc

     

     

     

     

     

  • 0 in reply to Marc48067
    Expert 2000 points

    Hi,

    my colleague did some posts on the same issue and the problem could be solved with your help.

    See http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/p/64187/231179.aspx#231179

    Thanks

    Marc