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DM6467 I2C boot mode

In my design I am going to use the I2C master boot mode for the DM6467. Since the RBL expects external boot EEPROM with slave address 0x50, I have to use a mux in my design since this address is shared by more than 1 I2C device. Is it safe to connect one of the GPIOs of the DM6467 to the select pin of the mux for allowing booting through I2C - Is the GPIO pin becomes stable fast enough to allow this?

  • Generally the GPIO pins are tri-stated coming out of reset so you would need a resistor to set the state as you require.

    Most I2C devices have a pin that allows you to control the slave address, e.g. pull it low and slave address is 0x50 and pull it high and slave address is 0x51.  Do you not have such a pin on your EEPROM?  I recommend that you double-check because that would be a much cleaner solution.


  • Thank you, but I already know that the GPIO pins are tri-stated coming out of reset, but the question is does the GPIO tri-states fast enough before the RBL activates the I2C to read the boot EEPROM contents?

    About my device, I didn't mention that it is a DDC EEPROM which must have the address 0x50, and of course it has pins to change its address, but this address should not be changed according to DDC channel specifications.

  • Yes, the I2C pins will be tri-stated.  See the "Reset Electrical/Data Timing" section of the data sheet.  Parameter #17 (Delay time, RESET low to Z Group high impedance) shows that those pins will tri-state a maximum of 20ns after the reset pin has been asserted.

  • Thank you.

    Do you know where can I find the time it takes after reset till the RBL starts driving the I2C lines in I2C boot mode?

  • Sorry, we don't measure/provide that info.  You'd have to measure it on a scope.