I am being tripped up using ACNT/BCNT/CCNT registers in the DMA (DM6435 DSP).
Starting with a basic block copy function that works:
void DmaBlockCopy(void *pDst, void *pSrc, Uint32 length)
{
Uint32 chan = DMA_CHANNEL_ID_TEST;
Uint32 acnt = length;
Uint32 bcnt = 1;
Uint32 ccnt = 1;
Uint32 dstbidx = 0;
Uint32 srcbidx = 0;
Uint32 dstcidx = 0;
Uint32 srccidx = 0;
dmaParamSets->regs[chan].OPT = DMA_OPT_XFER_COMPLETE_INT_ENABLED | DMA_OPT_PARAM_SET_STATIC | (chan << 12);
dmaParamSets->regs[chan].SRC = (Uint32)pSrc;
dmaParamSets->regs[chan].A_B_CNT = (bcnt << 16) | acnt;
dmaParamSets->regs[chan].DST = (Uint32)pDst;
dmaParamSets->regs[chan].SRC_DST_BIDX = (dstbidx << 16) | srcbidx;
dmaParamSets->regs[chan].LINK_BCNTRLD = 0x0000FFFF;
dmaParamSets->regs[chan].SRC_DST_CIDX = (dstcidx << 16) | srccidx;
dmaParamSets->regs[chan].CCNT = ccnt;
DMA_ClearEventMissed(chan);
DMA_ClearIntEvent(chan);
DMA_EnableIntEvent(chan);
SEM_reset(&SEM_DMA, 0);
DMA_Start(chan);
I try to change it to transfer ACNT*BCNT, this times out:
void DmaBlockCopy(void *pDst, void *pSrc, Uint32 length)
{
Uint32 chan = DMA_CHANNEL_ID_TEST;
Uint32 acnt = length / 4;
Uint32 bcnt = 4;
Uint32 ccnt = 1;
Uint32 dstbidx = 0;
Uint32 srcbidx = 4;
Uint32 dstcidx = 0;
Uint32 srccidx = 0;
dmaParamSets->regs[chan].OPT = DMA_OPT_XFER_COMPLETE_INT_ENABLED | DMA_OPT_PARAM_SET_STATIC | (chan << 12);
dmaParamSets->regs[chan].SRC = (Uint32)pSrc;
dmaParamSets->regs[chan].A_B_CNT = (bcnt << 16) | acnt;
dmaParamSets->regs[chan].DST = (Uint32)pDst;
dmaParamSets->regs[chan].SRC_DST_BIDX = (dstbidx << 16) | srcbidx;
dmaParamSets->regs[chan].LINK_BCNTRLD = 0x0000FFFF;
dmaParamSets->regs[chan].SRC_DST_CIDX = (dstcidx << 16) | srccidx;
dmaParamSets->regs[chan].CCNT = ccnt;
DMA_ClearEventMissed(chan);
DMA_ClearIntEvent(chan);
DMA_EnableIntEvent(chan);
SEM_reset(&SEM_DMA, 0);
DMA_Start(chan);
I try AB-Synchronized, this completes but the data does not compare:
void DmaBlockCopy(void *pDst, void *pSrc, Uint32 length)
{
Uint32 chan = DMA_CHANNEL_ID_TEST;
Uint32 acnt = length / 4;
Uint32 bcnt = 4;
Uint32 ccnt = 1;
Uint32 dstbidx = 0;
Uint32 srcbidx = 4;
Uint32 dstcidx = 0;
Uint32 srccidx = 0;
dmaParamSets->regs[chan].OPT = DMA_OPT_XFER_COMPLETE_INT_ENABLED | DMA_OPT_PARAM_SET_STATIC | DMA_OPT_AB_SYNCHRONIZED | (chan << 12);
dmaParamSets->regs[chan].SRC = (Uint32)pSrc;
dmaParamSets->regs[chan].A_B_CNT = (bcnt << 16) | acnt;
dmaParamSets->regs[chan].DST = (Uint32)pDst;
dmaParamSets->regs[chan].SRC_DST_BIDX = (dstbidx << 16) | srcbidx;
dmaParamSets->regs[chan].LINK_BCNTRLD = 0x0000FFFF;
dmaParamSets->regs[chan].SRC_DST_CIDX = (dstcidx << 16) | srccidx;
dmaParamSets->regs[chan].CCNT = ccnt;
DMA_ClearEventMissed(chan);
DMA_ClearIntEvent(chan);
DMA_EnableIntEvent(chan);
SEM_reset(&SEM_DMA, 0);
DMA_Start(chan);