This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

C6455 EMIF / C5510 HPI - master/slave race condition

I'm using C6455 EMIF to connect to a C5510 HPI.  All data transfer's working great, but I'm running into a race condition which I can't seem to figure out how to solve.  

Here's the setup: I've got a couple of ring buffers on both the C6455 and C5510 as well as a couple of memory locations which I access from both chips.  99% of the time (actually, more like 6 nines), everything works fine, but occasionally from the C6455 I attempt to write to a memory location on the C5510 while the C5510 is also trying to write to that same memory location.  Of course bad things happen, and the resultant value at that memory location becomes incorrect.

My question is: Is there any way of preventing something like this?  The standard LCK or semaphore techniques obviously won't work because of the data residing on two different chips.  I'm trying to come up with some smart way of eliminating this race condition, maybe something like a write and verify on the C5510 (but with less expense).  Any suggestions would be appreciated!

  • There are various ways to solve memory conflicts, but they have tradeoffs and address different issues.

    What is the purpose of the memory location that will be written by both processors?

    The location is in the C5510's memory space, right? Is it internal or external?

    How many locations can be written by both processors?

    What "expense" can you accept, on each processor?

    What is the scenario under which this location or locations are written by the C6455? By the C5510?

  • Hi Randy, thanks for the quick reply.  I've manged to remove (I believe) any possibility of this happening with some careful HWI_disable/HWI_restore calls, and I'm no longer seeing the problems I was previously.  I appreciate your help.